US3622802A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Differential amplifier system
Assignee: Recognition Equipment Inc
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Filing: 1969-05-15
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Granted: 1971-11-23
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Expires: 1989-05-15
Abstract
Abstract Character recognition is accomplished by providing for comparison of the output of each transducer in a retina with the average of a selected number of transducers in a surrounding threshold area. Means are then provided for generating a black output voltage at an analog level and a white output voltage at reference level if the transducer is in registration with an area darker than the average optical density of the threshold area. Conversely the latter means generates a white output voltage at an analog level and a black output voltage at a reference level if the transducer is in registration with an area lighter than the average of the threshold area.
Inventors
- 👤 Leonard J Nunley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:32
CPC Classifications
G; G06; G06V; G06V30/00; G06V30/10; G06V30/16; G06V30/162
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
125 words
A differential amplifier system which comprises: a. a first differential amplifier circuit having a pair of inputs for producing a binary signal of one state when a first input exceeds a second input and of a second state when the first input is exceeded by the second input, b. a second differential amplifier circuit having the signal from said first input applied to a first input of said second differential amplifier circuit with said binary signal applied to the second input of said second differential amplifier circuit, and c. a pair of feedback loops in said second differential amplifier circuit for limiting one output of said second differential amplifier circuit to a reference voltage level when the other output thereof changes from said reference level.
Claim 2
Dependent Claim
125 words
A differential amplifier system which comprises: a. a first differential amplifier circuit having a pair of inputs for producing a binary signal of one state when a first input exceeds a second input and of a second state when the first input is exceeded by the second input, b. a second differential amplifier circuit having the signal from said first input applied to a first input of said second differential amplifier circuit with said binary signal applied to the second input of said second differential amplifier circuit, and c. a pair of feedback loops in said second differential amplifier circuit for limiting one output of said second differential amplifier circuit to a reference voltage level when the other output thereof changes from said reference level.
Claim 3
Dependent Claim
229 words
A differential amplifier system which comprises: a. a first differential amplifier circuit including a pair of transistors, b. a common supply circuit for the emitters of both transistors, c. means for applying a signal voltage to the base of the first of said transistors, d. means for applying a reference signal to the base of the second of said transistors, e. a reference supply voltage connected to the collector of said second of said transistors, f. an output circuit leading from the collector of the first of said transistors for producing a binary output signal having one of two states, one of said states being ground potential, g. a second differential amplifier circuit having a current source for driving the emitters of a second pair of transistors, h. means for applying said signal voltage to the base of one of said second pair of transistors, i. means for applying said binary output signal to the base of the other of said second pair of transistors, j. separate output circuits connected to the collector circuits of said second pair of transistors, and k. a pair of feedback loops each extending from the collector circuit of one of said second pair of transistors to the collector circuit of the other of said second pair of transistors for limiting the output of one transistor when the output of the other transistor changes.
Claim 4
Dependent Claim
229 words
A differential amplifier system which comprises: a. a first differential amplifier circuit including a pair of transistors, b. a common supply circuit for the emitters of both transistors, c. means for applying a signal voltage to the base of the first of said transistors, d. means for applying a reference signal to the base of the second of said transistors, e. a reference supply voltage connected to the collector of said second of said transistors, f. an output circuit leading from the collector of the first of said transistors for producing a binary output signal having one of two states, one of said states being ground potential, g. a second differential amplifier circuit having a current source for driving the emitters of a second pair of transistors, h. means for applying said signal voltage to the base of one of said second pair of transistors, i. means for applying said binary output signal to the base of the other of said second pair of transistors, j. separate output circuits connected to the collector circuits of said second pair of transistors, and k. a pair of feedback loops each extending from the collector circuit of one of said second pair of transistors to the collector circuit of the other of said second pair of transistors for limiting the output of one transistor when the output of the other transistor changes.
Claim 5
Dependent Claim
196 words
A differential amplifier system which comprises: a. a first differential amplifier circuit including a pair of tRansistors, b. a common supply circuit for the emitters of both transistors, c. means for applying a signal voltage to the base of the first of said transistors, d. diode means for applying a reference signal to the base of the second of said transistors, e. a reference supply voltage connected to the collector of said second of said transistors, f. an output circuit leading from the collector of the first of said transistors for providing a binary output signal having one of two states only when said reference voltage exceeds said signal voltage by an amount equal to the voltage drop across said diode means, g. a second differential amplifier circuit having the signal voltage applied to a first input of said second differential amplifier circuit with said binary signal applied to the second input of said second differential amplifier circuit, and h. a pair of feedback loops in said second differential amplifier circuit for limiting one output of said second differential amplifier circuit to a reference voltage level when the other output thereof changes from said reference level.
Claim 6
Dependent Claim
196 words
A differential amplifier system which comprises: a. a first differential amplifier circuit including a pair of tRansistors, b. a common supply circuit for the emitters of both transistors, c. means for applying a signal voltage to the base of the first of said transistors, d. diode means for applying a reference signal to the base of the second of said transistors, e. a reference supply voltage connected to the collector of said second of said transistors, f. an output circuit leading from the collector of the first of said transistors for providing a binary output signal having one of two states only when said reference voltage exceeds said signal voltage by an amount equal to the voltage drop across said diode means, g. a second differential amplifier circuit having the signal voltage applied to a first input of said second differential amplifier circuit with said binary signal applied to the second input of said second differential amplifier circuit, and h. a pair of feedback loops in said second differential amplifier circuit for limiting one output of said second differential amplifier circuit to a reference voltage level when the other output thereof changes from said reference level.
Claim 7
Dependent Claim
172 words
A differential amplifier system which comprises: a. a first differential amplifier circuit having a pair of inputs for producing a binary signal of one state when a signal voltage applied to a first input exceeds a reference signal to a second input and a second state when the signal voltage is exceeded by the reference voltage, b. a second differential amplifier circuit having a current source for driving the emitters of a pair of transistors, c. means for applying the signal voltage to the base of the other of said pair of transistors, d. means for applying said binary signal to the base of the other of said pair of transistors, e. separate output circuits connected to the collector circuits of said pair of transistors, and f. a pair of feedback loops each extending from the collector circuit of one of said pair of transistors to the collector circuit of the other of said pair of transistors for limiting the output of one transistor when the output of the other transistor changes.
Claim 8
Dependent Claim
172 words
A differential amplifier system which comprises: a. a first differential amplifier circuit having a pair of inputs for producing a binary signal of one state when a signal voltage applied to a first input exceeds a reference signal to a second input and a second state when the signal voltage is exceeded by the reference voltage, b. a second differential amplifier circuit having a current source for driving the emitters of a pair of transistors, c. means for applying the signal voltage to the base of the other of said pair of transistors, d. means for applying said binary signal to the base of the other of said pair of transistors, e. separate output circuits connected to the collector circuits of said pair of transistors, and f. a pair of feedback loops each extending from the collector circuit of one of said pair of transistors to the collector circuit of the other of said pair of transistors for limiting the output of one transistor when the output of the other transistor changes.
References Cited (Backward Citations)
US3310688A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-22 | 1975-05-24 | 1975-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-22 | 1979-05-24 | 1979-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-22 | 1983-05-24 | 1983-11-23 | $7700.00 | Window Closed / Lapsed |