US3622693A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Modulator circuit having utility in video recording
Assignee: Motorola Solutions Inc
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Filing: 1970-05-18
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Granted: 1971-11-23
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Expires: 1990-05-18
Abstract
Abstract A color signal modulator encodes or modulates two channels of color signal information as pulse-width modulated, time-divisionmultiplexed pulses to produce an input signal for an electronic video-recording (EVR) system. At predetermined intervals, a phase-synchronizing sequence is provided by modulation of the pulse widths of the two channels in the form of maximum width modulation in one channel, alternating with no information in the other channel, the pattern being repeated a preestablished number of times.
Inventors
- 👤 Robert R Del Ciello
- 👤 Francis H Hilbert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 12:53
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/79; H04N9/80; H04N9/82
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
350 words
A modulator for producing pulse-width modulated, timedivision-multiplexed pulses from at least first and second sources of signals to be modulated, including in combination: first and second comparator circuits, each having a signal input and reference input and producing a first output with the magnitude of the signal applied to the signal input having a predetermined relationship with respect to the magnitude of the potential applied to the reference input, and producing a second output with the magnitude of the signal input equaling the magnitude of the reference potential applied to the reference input; means for coupling the first source of signals to the signal input of the first comparator circuit and the second source of signals to the signal input of the second comparator circuit; clock circuit means producing a clock control signal at a predetermined frequency; control means having first and second complementary outputs coupled with the first and second comparator circuits, the outputs of the control means each being capable of assuming either of first and second states, with a control means output in the first state causing the comparator circuit coupled thereto to produce said second output thereof and with a control means output in the second state enabling the comparator circuit coupled thereto to produce said first comparator output; means for applying the clock control signal to the control means for changing the states of the first and second outputs thereof in response thereto at a predetermined rate; means coupled with the reference inputs of the first and sEcond comparator circuits for producing a reference potential varying from an initial value at the beginning of each time interval established by a change of state of the outputs of the control means at a predetermined rate toward a final value, which is selected with respect to the range of signals applied to the first and second signal inputs to cause the magnitude of the reference potential to equal the magnitude of the input signal during such a time interval; and means for combining the outputs of the first and second comparator circuits to produce said modulated signal.
Claim 2
Dependent Claim
350 words
A modulator for producing pulse-width modulated, timedivision-multiplexed pulses from at least first and second sources of signals to be modulated, including in combination: first and second comparator circuits, each having a signal input and reference input and producing a first output with the magnitude of the signal applied to the signal input having a predetermined relationship with respect to the magnitude of the potential applied to the reference input, and producing a second output with the magnitude of the signal input equaling the magnitude of the reference potential applied to the reference input; means for coupling the first source of signals to the signal input of the first comparator circuit and the second source of signals to the signal input of the second comparator circuit; clock circuit means producing a clock control signal at a predetermined frequency; control means having first and second complementary outputs coupled with the first and second comparator circuits, the outputs of the control means each being capable of assuming either of first and second states, with a control means output in the first state causing the comparator circuit coupled thereto to produce said second output thereof and with a control means output in the second state enabling the comparator circuit coupled thereto to produce said first comparator output; means for applying the clock control signal to the control means for changing the states of the first and second outputs thereof in response thereto at a predetermined rate; means coupled with the reference inputs of the first and sEcond comparator circuits for producing a reference potential varying from an initial value at the beginning of each time interval established by a change of state of the outputs of the control means at a predetermined rate toward a final value, which is selected with respect to the range of signals applied to the first and second signal inputs to cause the magnitude of the reference potential to equal the magnitude of the input signal during such a time interval; and means for combining the outputs of the first and second comparator circuits to produce said modulated signal.
Claim 3
Dependent Claim
55 words
The combination according to claim 1, wherein the first and second sources of signals are analog signals of varying amplitudes, and the first and second comparator circuits are first and second differential amplifier switch circuits, each having first and second outputs, with the first outputs thereof being coupled together to produce said modulated output signal.
Claim 4
Dependent Claim
92 words
The combination according to claim 1, wherein the first and second comparator circuits comprise first and second differential amplifier circuits, and the control means includes a third differential amplifier circuit having third and fourth outputs, with the third output coupled with the first differential amplifier and the fourth output coupled with the second differential amplifier to operate, respectively, as current sources for the first and second differential amplifiers, the means for applying the clock signals to the third differential amplifier alternately causing current to flow at a said third and fourth outputs.
Claim 5
Dependent Claim
33 words
The combination according to claim 1 wherein the means for providing the varying reference potential includes a sawtooth signal generator recycled with a change of state of the outputs of the control means.
Claim 6
Dependent Claim
148 words
The combination according to claim 4, wherein the sawtooth generator includes first and second charge storage means and a charge control differential amplifier switch means having first and second outputs thereof coupled with the first and second charge storage means, respectively, and responsive to the clock control signal for alternately providing charge paths for the first and second charge storage means in synchronism with the changes of state of the outputs of the control means; a discharge differential amplifier switch means having first and second outputs; and first and second shunt switch means coupled across the first and second charge storage means, respectively, and controlled by the respective first and second outputs of the discharge differential amplifier switch means, said discharge differential amplifier being responsive to the clock control signal for alternately rendering the first and second shunt switch means conductive to discharge the respective charge storage means.
Claim 7
Dependent Claim
90 words
The combination according to claim 5, wherein the relative phases of operation of the charge control differential amplifier and the discharge differential amplifier are such that when a charge path is provided for the first charge storage means, the second charge storage means is being shunted by the corresponding shunt switch means and vice versa, the first charge storage means being coupled with the reference signal input of the first comparator circuit and the second charge storage means being coupled with the reference signal input of the second comparator circuit.
Claim 8
Dependent Claim
32 words
The combination according to claim 5, wherein said first and second signal sources are first and second analog signals from a color camera corresponding to the color information of two different hues.
Claim 9
Independent Claim
427 words
A system for modulating color signals provided on first and second channels corresponding to two different hues to form a sequence of pulse-width modulated and time-division-multiplexed pulses, alternating pulses in the pulse sequence representing the two different hues of information, and the pulse-width modulation of the pulses corresponding to the color saturation, including in combination: first and second cOmparator circuits, each having a signal input and a reference input and producing a first output with the magnitude of the signal applied to the signal input having a predetermined relationship with respect to the magnitude of the potential applied to the reference input, and producing a second output with the magnitude of the signal input equaling the magnitude of the reference potential applied to the reference input; means for coupling the first source of signals to the signal input of the first comparator circuit and the second source of signals to the signal input of the second comparator circuit; clock circuit means producing a clock control signal at a predetermined frequency; control means having first and second complementary outputs coupled with the first and second comparator circuits, the outputs of the control means each being capable of assuming either of first and second states, with a control means output in the first state causing the comparator circuit coupled thereto to produce said second output and with a control means output in the second enabling the comparator circuit coupled thereto to produce said first comparator output; means for applying a clock control signal to the control means to change the states of the first and second outputs thereof in response thereto at a predetermined rate; means coupled with the reference inputs of the first and second comparator circuits for producing a reference potential varying from an initial value at the beginning of each time interval established by a change of state of the outputs of the control means, at a predetermined rate, to a final value which is selected with respect to the range of signals applied to the first and second signal inputs to cause the magnitude of the reference potential to equal the magnitude of the input signal during such a time interval; means for combining the outputs of the first and second comparator circuits to produce the modulated signals; and synchronizing signal control means responsive to the clock circuit means for overriding the first and second input signals applied to first and second comparator circuit means to produce periodically a predetermined phase-synchronizing signal portion in the modulated signal obtained from the outputs of the comparator circuits.
Claim 10
Independent Claim
427 words
A system for modulating color signals provided on first and second channels corresponding to two different hues to form a sequence of pulse-width modulated and time-division-multiplexed pulses, alternating pulses in the pulse sequence representing the two different hues of information, and the pulse-width modulation of the pulses corresponding to the color saturation, including in combination: first and second cOmparator circuits, each having a signal input and a reference input and producing a first output with the magnitude of the signal applied to the signal input having a predetermined relationship with respect to the magnitude of the potential applied to the reference input, and producing a second output with the magnitude of the signal input equaling the magnitude of the reference potential applied to the reference input; means for coupling the first source of signals to the signal input of the first comparator circuit and the second source of signals to the signal input of the second comparator circuit; clock circuit means producing a clock control signal at a predetermined frequency; control means having first and second complementary outputs coupled with the first and second comparator circuits, the outputs of the control means each being capable of assuming either of first and second states, with a control means output in the first state causing the comparator circuit coupled thereto to produce said second output and with a control means output in the second enabling the comparator circuit coupled thereto to produce said first comparator output; means for applying a clock control signal to the control means to change the states of the first and second outputs thereof in response thereto at a predetermined rate; means coupled with the reference inputs of the first and second comparator circuits for producing a reference potential varying from an initial value at the beginning of each time interval established by a change of state of the outputs of the control means, at a predetermined rate, to a final value which is selected with respect to the range of signals applied to the first and second signal inputs to cause the magnitude of the reference potential to equal the magnitude of the input signal during such a time interval; means for combining the outputs of the first and second comparator circuits to produce the modulated signals; and synchronizing signal control means responsive to the clock circuit means for overriding the first and second input signals applied to first and second comparator circuit means to produce periodically a predetermined phase-synchronizing signal portion in the modulated signal obtained from the outputs of the comparator circuits.
Claim 11
Dependent Claim
98 words
The combination according to claim 8 wherein the synchronizing signal control means supplied a first synchronizing control pulse of a first predetermined duration to the first and second comparator circuits to render the first and second comparator circuits insensitive to the corresponding input signals for the duration of said first pulse and the synchronizing signal control means provides a second control pulse of a second predetermined duration to only one of the first or second comparator circuit to which the second control pulse is applied to produce a pulse-width modulation of a predetermined width at the output thereof.
Claim 12
Dependent Claim
263 words
The combination according to claim 8, wherein the synchronizing signal control means produces a first synchronizing pulse of a first predetermined length and a second synchronizing pulse of a second, shorter predetermined length, the first comparator circuit includes a first differential amplifier, providing the first and second outputs, and having said reference input and another input, a second differential amplifier, the output of which is coupled with the other input of the first differential amplifier as the signal input thereto with the signal input for the first comparator circuit being applied to an input of the second differential amplifier, and means responsive to the first synchronizing control pulse for shunting input signals applied to the input of the second differential amplifier; and the second comparator circuit includes a third differential amplifier providing the first and second outputs and having the reference input and a signal input coupled in tandem to the outputs of fourth and fifth differential amplifiers, the fourth differential amplifier having an input signal terminal, and means responsive to the first synchronizing control pulse for shunting input signals applied to the input signal terminal thereof, the fifth differential amplifier being responsive to the first and second synchronizing control pulses for providing an output signal to the input terminal of the third differential amplifier upon termination of the second synchronizing pulse during the remainder of the first synchronizing pulse, the output signal corresponding to a predetermined width of an input signal, the fifth differential amplifier being ineffective in the presence of both synchronizing pulses and in the absence of either synchronizing pulse.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-22 | 1975-05-24 | 1975-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-22 | 1979-05-24 | 1979-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-22 | 1983-05-24 | 1983-11-23 | $7700.00 | Window Closed / Lapsed |