Abstract An integrated circuit and process for making it wherein a decoupling capacitor is provided beneath devices in the surface of the integrated circuit by the formation of a first epitaxial layer between an N substrate having a P zone diffused therein and an N device-containing epitaxial layer. A P channel diffusion to the P zone formed in the substrate will serve as a damping resistor in combination with the coupling capacitor. The process for forming such a decoupling capacitor in an integrated circuit comprises, inter alia, diffusing P impurities into the substrate to form a large junction which will subsequently function as a decoupling capacitor. A first intrinsic, P or N epitaxial layer is then grown on the semiconductor substrate. Subsequently, an N epitaxial layer is grown on the first epitaxial layer. A P channel is then driven through the N epitaxial layer and the first epitaxial layer to contact the P diffused zone which serves as the decoupling capacitor. This P channel diffusion will serve as a damping resistor in combination with the decoupling capacitor. Device diffusion, i.e., transistors, resistors, etc., will take place into the N epitaxial layer, and during growth of the epitaxial layers the P zone will significantly outdiffuse into the first epitaxial layer. Appropriate channels, isolations and contacts are also provided.
An integrated semiconductor device in accordance with claim 1 wherein said first epitaxial layer is either N or P conductivity type.
Claim 2
Dependent Claim
19 words
An integrated semiconductor device of claim 1 wherein said first epitaxial layer has a resistivity greater than 10 ohms-cm.
Claim 3
Dependent Claim
42 words
The integrated circuit semiconductor device of claim 1 wherein said circuit element includes: an emitter region of the opposite conductivity type from said P region in said substrate; and a base region of the same conductivity type as said P base region.
Claim 4
Dependent Claim
46 words
The integrated circuit semiconductor device of claim 1 wherein additional P channels extend through both of said epitaxial layers and electrically contact said P region, whereby at least one of said circuit elements is isolated by said additional P channels in combination with said P region.
Claim 5
Dependent Claim
17 words
The integrated circuit semiconductor device of claim 1 wherein said P region is a P diffused region.
Claim 6
Dependent Claim
21 words
The integrated circuit semiconductor device of claim 5 wherein said additional P channels are formed simultaneously with said P resistor channel.
Claim 7
Dependent Claim
44 words
The integrated circuit semiconductor device of claim 1 further comprising an N conductivity-type region of less resistivity than said second epitaxial layer extending from said circuit elements within said second epitaxial layer through said first epitaxial layer and making electrical contact with said substrate.
Claim 8
Dependent Claim
50 words
The integrated circuit semiconductor device of claim 8 further comprising means for connecting a power source with the surface of said substrate opposite said P region in said substrate, whereby power is distributed from said substrate via said N conductivity-type region to said circuit elements within said second epitaxial layer.