Nonvolatile read-write memory with addressing

Claim 1

In a computer memory employing plural dielectric layered variable-threshold transistor memory cells for storing respective binary bit data, each of said cells having source, drain and gate electrodes formed on a substrate common to all of the memory cells and being characterized by an electrically controllable conduction threshold established in accordance with the polarity of a voltage difference applied between the gate electrode and the substrate: A. means for writing binary bit data into each of said memory cells comprising 1. means for applying a first threshold voltage between the gate electrode of each cell and the common substrate, said first threshold voltage having a polarity that inhibits the formation of a conducting channel between the source and drain electrodes of the memory cells whereby all of the memory cells are preset to a first binary state, 2. selection means to select those memory cells that are to be set to a second binary state, 3. means to apply a second threshold voltage between the gate electrodes of the selected memory cells and the common substrate, said second threshold voltage having a polarity opposite that of said first threshold voltage, and 4. means to maintain the source and drain electrodes of the memory cells not selected by said selection means at a voltage level intermediate the voltage level of the substrate and said second threshold voltage, B. means for reading information out of said memory cells comprising means to apply a READ voltage between the substrate and the gate electrodes of the memory cells, said READ voltage having the same polarity as the second threshold voltage but a magnitude less than said second threshold voltage.