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US3617399A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating semiconductor power devices within high resistivity isolation rings

Assignee: Texas Instruments Inc
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Filing: 1968-10-31
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Granted: 1971-11-02
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Expires: 1988-10-31
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Abstract

Abstract Improved performance characteristics are possible for semiconductor power devices by encircling the active elements with a high-resistivity isolation ring. Power devices encircled by a high-resistivity isolation ring may be fabricated by a method that includes the step of growing a bar of single-crystal semiconductor material having a radial resistivity varying in a controlled manner from the center thereof. This single crystal bar is then sliced perpendicularly transverse to the longitudinal axis into plane surface wafers of a desired thickness. After various surface preparation techniques, the active regions of the semiconductor power device may be formed in one of the plane surfaces at a desired resistivity section of the slice by photomask and etch techniques. By forming a center section of uniform resistivity encircled by a ring of high-resistivity material, which in turn is encircled by another uniform resistivity area, an integrated circuit may be fabricated on one slice of a single-crystal bar. In these circuits, the power devices would be isolated within the center region by means of the high-resistivity ring.

Inventors

  • 👤 William L Fowler

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 05:15
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/085

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 44 words
A method of fabricating large area semiconductor power devices as set forth in claim 1 wherein said plane surface wafers have a uniform center resistivity area surrounded by a high-resistivity area forming an isolation ring around a power device formed in center resistivity area.
Claim 2
Independent Claim 110 words
A method of fabricating large area semiconductor power devices comprising: growing a bar of single-crystal semiconductor material from a doped thermally decomposable vapor source to produce a region of desired uniform resistivity, modifying said dopant after the bar has grown to a predetermined size and continuing the bar growth with the modified thermally decomposable vapor source to form a resistivity ring about the center area of different resistivity, slicing said bar perpendicularly transverse to the longitudinal axis thereof into plane surface wafers of a desired thickness, and forming the active regions of a semiconductor power device in one of the plane surfaces of said wafer in a preferred resistivity area.
Claim 3
Dependent Claim 30 words
A method of fabricating large area semiconductor power devices as set forth in claim 3 wherein the active regions of the semiconductor power device are formed by a diffusion process.
Claim 4
Dependent Claim 29 words
A method of fabricating large area semiconductor power devices as set forth in claim 3 wherein the thermally decomposable vapor source includes a stream of hydrogen gas and trichlorosilane.
Claim 5
Independent Claim 111 words
A method of fabricating an integrated circuit including an isolated power device comprising: growing a bar of single-crystal semiconductor material having a center area of a uniform resistivity surrounded by a ring of different resistivity followed by an outer area of uniform resistivity on the order of said center area, slicing said bar perpendicularly transverse to the longitudinal axis thereof into plane surface wafers of a desired thickness, and forming the active regions of a semiconductor power device in one of the plane surfaces of said wafer in the center area surrounded by said isolation ring and the active regions of other semiconductor devices in the outer area of uniform resistivity.
Claim 6
Dependent Claim 95 words
A method of fabricating an integrated circuit including an isolated power device as set forth in claim 6 wherein growing the single-crystal bar of semiconductor material includes the steps of: doping the thermally decomposable vapor source for growing said bar to produce a center area of a desired uniform resistivity, cutting off said dopant after the bar has grown to a predetermined size to form the high-resistivity ring about said center area, and reintroducing the doped thermally decomposable vapor source for growing the outer area of uniform resistivity on the order of said center area.
Claim 7
Dependent Claim 29 words
A Method of fabricating an integrated circuit including an isolated power device as set forth in claim 6 wherein said active regions are formed by a process of diffusion.
Claim 8
Dependent Claim 31 words
A method of fabricating an integrated circuit including an isolated power device as set forth in claim 7 wherein the thermally decomposable vapor source includes a stream of hydrogen containing trichlorosilane.

References Cited (Backward Citations)

US2763581A Cited
US3150299A Cited
US3168422A Cited
US3172791A Cited
US3460006A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-11-01 1975-05-03 1975-11-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-11-01 1979-05-03 1979-11-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-11-01 1983-05-03 1983-11-02 $7700.00 Window Closed / Lapsed

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