US3615875A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating semiconductor devices by ion implantation
Assignee: Hitachi Ltd
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Filing: 1969-09-29
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Granted: 1971-10-26
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Expires: 1989-09-29
Abstract
Abstract A semiconductor body acting as a collector is directed at a predetermined surface area by an inert ion beam from such a direction as not to produce a channeling effect in the body, whereby obtaining an amorphous surface region thereat, then directed at a larger surface area including said predetermined surface area by an active impurity ion beam of the conductivity type opposite to said body from a direction producing the channeling effect in the body, thereby obtaining a base region in the semiconductor body with a PN junction therebetween which has a partial projection in its bottom part, and further directed at said predetermined surface area by an active impurity ion beam of the same conductivity type as that of the body from the channeling-effect-providing direction, thereby obtaining an emitter region, and finally heat-treating, so that a transistor without defects due to the emitter dip effect is obtained.
Inventors
- 👤 Todahisa Morita
- 👤 Takashi Tokuyama
- 👤 Takashi Tsuchimoto
- 👤 Takao Miyazaki
- 👤 Shigeru Nishimatsu
- 👤 Takahide Ikeda
- 👤 Hisumi Sano
- 👤 Masatada Horiuchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 23:31
CPC Classifications
H; H10; H10D; H10D99/00; H10D10/00; H10P; H10P30/00; H10P30/20; H10P95/00; Y; Y10; Y10S; Y10S438/00; Y10S438/965
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
234 words
A method for producing a semiconductor device having a PN-junction comprising: a. forming on one surface of a semiconductor single crystal body having a first conductivity type a first masking layer having a first aperture to expose a first surface portion of the semiconductor body therethrough; b. directing a first ion beam of inert element to the first surface portion of the semiconductor body through the first aperture of the first masking layer from such a direction that the directed inert ions are provided with no channeling effect in the semiconductor body so that a thin amorphous layer is formed at the first surface portion of the semiconductor body; c. forming on said one surface of the semiconductor body a second masking layer having a second aperture larger than said first aperture to expose a second surface portion of the semiconductor body therethrough, said second surface portion including said first surface portion therewithin; and d. directing a second ion beam of active impurity having a second conductivity type opposite to said first conductivity type, to said second surface portion of the semiconductor body through the second aperture of the second masking layer from such a direction that the directed active impurity ions are provided with channeling effect in the semiconductor body, whereby obtaining a second conductivity-type region within the semiconductor body with a PN-junction therebetween which has a partial projection at its bottom face.
Claim 2
Dependent Claim
88 words
A method as defined in claim 1, wherein said semiconductor body is of silicon single crystal having (110) face as said one surface; wherein said first ion beam is directed from such a direction that deviates more than 7* in angle from a perpendicular direction with respect to said one surface of the semiconductor body; and wherein said second ion beam is directed from such a direction that is within 3* in deviation angle from the perpendicular direction with respect to said one surface of the semiconductor body.
Claim 3
Independent Claim
363 words
A method for fabricating a transistor, which comprises the steps of: a. forming on one surface of a semiconductor single-crystal body, which forms a collector region of the transistor and has a first conductivity type, a first masking layer having a first aperture to expose a first surface portion of the semiconductor body therewithin; b. directing a first ion beam of inert element to the first portion of the semiconductor body through the first aperture of The first masking layer from such a direction that the directed inert ions are provided with no channeling effect in the semiconductor body so that a thin amorphous layer is formed at the first surface portion of the semiconductor body; c. forming on said one surface of the semiconductor body a second masking layer having a second aperture larger than said first aperture to expose a second surface portion of the semiconductor body therethrough, said second aperture including said first surface portion therewithin; d. directing a second ion beam of active impurity of a second conductivity type opposite to said first conductivity type, to said second surface portion of the semiconductor body through the second aperture of the second masking layer from such a direction that the directed active impurity ions are provided with channeling effect in the semiconductor body so that a base region is formed in the body with a PN-junction therebetween which has a partial projection at its bottom face underneath said amorphous layer; e. forming on said one surface of the semiconductor body a second masking layer having a third aperture to expose the surface portion of said amorphous layer of the semiconductor body therethrough; f. directing a third ion beam of active impurity ions of the first conductivity type, to said amorphous layer through the third aperture of the third masking layer so that an emitter region of the transistor is formed within the base region; g. annealing said semiconductor body to eliminate the amorphous layer and surface damages formed in the body during the directions of the ion beams; and h. providing electrodes to said emitter and base regions, respectively, whereby obtaining a transistor improved defects due to emitter dip effect.
Claim 4
Dependent Claim
88 words
A method as defined in claim 4, wherein said semiconductor body is of silicon single crystal having (110) face as said one surface; wherein said first ion beam is directed from such a direction that deviates more than 7* in angle from a perpendicular direction with respect to said one surface of the semiconductor body; and wherein said second ion beam is directed from such a direction that is within 3* in deviation angle from the perpendicular direction with respect to said one surface of the semiconductor body.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-10-25 | 1975-04-26 | 1975-10-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-10-25 | 1979-04-26 | 1979-10-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-10-25 | 1983-04-26 | 1983-10-26 | $7700.00 | Window Closed / Lapsed |