Abstract A data transmission system includes a transmitter for transmitting to a receiver data, as coded combinations of first and second bits wherein each of the first bits is represented by a group of substantially sinusoidal waveforms each having a first given period and each of the second bits is represented by a group of substantially sinusoidal waveforms each having a second given period. The receiver comprises means for detecting a given portion of each of the received waveforms, and a source of pulse signals which have a given repetition rate. A pulse counter counts the number of pulse signals occurring during the given portions of each of the waveforms. Count detector means give a first-bit indication when the count in the counter exceeds a first value and gives a second-bit indicator when the count of the pulse signals is less than a second given value. Integrator means receive the first- and second-bit indications to indicate whether the group of waveforms received in a given time interval represents a first-bit or a second-bit as determined by the number of first- and second-bit indications received during the given first-perceived first-perceived In addition the receiver has the facility to detect bits that are represented by different preassigned frequencies of the waveforms.
A receiver for a system which transmits data as coded combinations of first and second bits wherein each of said first bits is represented by a group of substantially sinusoidal waveforms, each of said waveforms having a first given period, and each of said second bits is represented by a group of substantially sinusoidal waveforms, each of said waveforms having a second given period, said receiver comprising: means for detecting a given portion of each of each of said waveforms; a source of pulse signals wherein the pulse signals have a given repetition rate; means for counting the number of said pulse signals occurring during said given portion of each of said waveforms; means for giving a first indication when the count of the pulse signals is within a first range of values and for giving a second indication when the count of the pulse signals is within a second range of values different from said first range during said given portion of each of said waveforms; and indication counter means receiving said first and second indications for indicating whether the bit being received during a given time interval is a first bit or a second bit in accordance with whether a given number of said first indications or a given number of said second indications is received during said given time interval, said indication counter means being an up-down counter having input means for receiving said first indications and second indications and an output for giving an indication as long as the accumulated count exceeds a certain value, said up-down counter including means for adding one to the accumulated count whenever a first indication is received and for subtracting one from the accumulated count whenever a second indication is received.
Claim 2
Dependent Claim
291 words
A receiver for a system which transmits data as coded combinations of first and second bits wherein each of said first bits is represented by a group of substantially sinusoidal waveforms, each of said waveforms having a first given period, and each of said second bits is represented by a group of substantially sinusoidal waveforms, each of said waveforms having a second given period, said receiver comprising: means for detecting a given portion of each of each of said waveforms; a source of pulse signals wherein the pulse signals have a given repetition rate; means for counting the number of said pulse signals occurring during said given portion of each of said waveforms; means for giving a first indication when the count of the pulse signals is within a first range of values and for giving a second indication when the count of the pulse signals is within a second range of values different from said first range during said given portion of each of said waveforms; and indication counter means receiving said first and second indications for indicating whether the bit being received during a given time interval is a first bit or a second bit in accordance with whether a given number of said first indications or a given number of said second indications is received during said given time interval, said indication counter means being an up-down counter having input means for receiving said first indications and second indications and an output for giving an indication as long as the accumulated count exceeds a certain value, said up-down counter including means for adding one to the accumulated count whenever a first indication is received and for subtracting one from the accumulated count whenever a second indication is received.
Claim 3
Dependent Claim
18 words
The receiver of claim 1 wherein said first and second ranges are separated by a plurality of values.
Claim 4
Dependent Claim
14 words
The receiver of claim 1, further comprising means for controllably changing said given values.
Claim 5
Dependent Claim
28 words
The receiver of claim 1 further comprisinG means for preventing the accumulated count from extending beyond a range of upper and lower values which bracket said certain value.