US3609747A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Solid-state display circuit with inherent memory
Assignee: AT&T Inc
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Filing: 1968-12-05
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Granted: 1971-09-28
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Expires: 1988-12-05
Abstract
Abstract The need for external memory and image regeneration circuitry in light-emitting semiconductor diode display circuits is eliminated by providing each light-emitting diode with a respective capacitive storage element and bilateral breakdown switch. The bilateral switch and storage element function as inherent memory for the light-emitting diode, operating in conjunction with an AC bias voltage to maintain the diode lighted upon application of a write pulse.
Inventors
- 👤 Dinh-Tuan Ngo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 11:43
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/30; G09G3/32; H; H04; H04N; H04N3/00; H04N3/10; H04N3/14; G09G2300/00; G09G2300/08; G09G2300/088
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
22 words
A two-terminal display cell comprising the serially connected combination of a bilateral breakdown switch, a light-emitting semiconductor device and charge storage means.
Claim 2
Dependent Claim
22 words
A two-terminal display cell comprising the serially connected combination of a bilateral breakdown switch, a light-emitting semiconductor device and charge storage means.
Claim 3
Dependent Claim
43 words
A display cell in accordance with claim 1 wherein said semiconductor device comprises a light-emitting diode and said charge storage means comprises a capacitor, said display cell further comprising a second diode connected in parallel with said light-emitting diode and poled opposite thereto.
Claim 4
Dependent Claim
31 words
A display cell in accordance with claim 1 wherein said semiconductor device comprises a light-emitting diode and said charge storage means comprises a second diode poled opposite to said light-emitting diode.
Claim 5
Dependent Claim
16 words
A display cell in accordance with claim 3 wherein said second diode is a light-emitting diode.
Claim 6
Dependent Claim
40 words
A display circuit comprising an array of display cells individually including the serially connected combination of light-emitting semiconductor device means and bilateral switch means, said light-emitting means including a pair of serially connected light-emitting diodes poled opposite to one another.
Claim 7
Dependent Claim
40 words
A display circuit comprising an array of display cells individually including the serially connected combination of light-emitting semiconductor device means and bilateral switch means, said light-emitting means including a pair of serially connected light-emitting diodes poled opposite to one another.
Claim 8
Dependent Claim
34 words
A display circuit comprising an array of display cells individually including the serially connected combination of light-emitting semiconductor device means, bilateral switch means and charge storage means connected in circuit with said switch means.
Claim 9
Dependent Claim
34 words
A display circuit comprising an array of display cells individually including the serially connected combination of light-emitting semiconductor device means, bilateral switch means and charge storage means connected in circuit with said switch means.
Claim 10
Dependent Claim
16 words
A display circuit in accordance with claim 6 wherein said charge storage means comprises a capacitor.
Claim 11
Dependent Claim
108 words
A display circuit in accordance with claim 7 wherein said switch means are normally nonconducting and are operable to a conducting state, said display circuit further comprising means for selectively addressing said display cells to initially operate said switch means at said addressed cells, said initial operation of said switch means placing a charge on said respective charge storage means connected to said switch means at said addressed cells, and alternating bias signal means connected to each of said cells, said bias signal means operative in conjunction with said charge on said respective charge storage means for periodically operating said switch means connected to said charge storage means.
Claim 12
Dependent Claim
85 words
A display circuit comprising an array of display cells individually including the serially connected combination of light-emitting semiconductor device means and bilateral switch means, said switch means being normally nonconducting and being operable to a conducting state; means for selectively addressing individual ones of said display cells to initially operate said switch means thereat; and bias means connected to each of said display cells and operative upon the initial operation of individual ones of said switch means for thereafter periodically operating said individual switch means.
Claim 13
Dependent Claim
85 words
A display circuit comprising an array of display cells individually including the serially connected combination of light-emitting semiconductor device means and bilateral switch means, said switch means being normally nonconducting and being operable to a conducting state; means for selectively addressing individual ones of said display cells to initially operate said switch means thereat; and bias means connected to each of said display cells and operative upon the initial operation of individual ones of said switch means for thereafter periodically operating said individual switch means.
Claim 14
Dependent Claim
38 words
A display circuit in accordance with claim 9 wherein said bias means comprises an alternating signal source connected to each of said display cells and of a magnitude insufficient to initially operate said switch means at said cells.
Claim 15
Dependent Claim
76 words
A display circuit in accordance with claim 9 wherein said display cells are arranged in a coordinate array and said addressing means comprises respective pulse transformers having secondary windings connected to the individual rows and columns of said coordinate array, each said trAnsformer having a primary winding connected to a respective address signal input lead and wherein said bias means comprises an alternating signal source connected to the secondary windings of each of said pulse transformers.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-27 | 1975-03-29 | 1975-09-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-27 | 1979-03-29 | 1979-09-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-27 | 1983-03-29 | 1983-09-28 | $7700.00 | Window Closed / Lapsed |