Logarithmic amplifier

Claim 2

A logarithmic amplifier for providing an output signal proportional to the logarithm of an input current signal within a range extending down to approximately 10 11 amps, said amplifier comprising: a. signal input means for said input signal, b. amplifier means having amplifier input means, and having amplifier output means for said output signal, c. said amplifier input means being connected to said signal input means, d. logarithmic element feedback means coupled between said amplifier output means and saId signal input means, e. capacitor feedback means coupled between said amplifier output means and said signal input means for smoothing out input signal fluctuations at the lower end of said range, f. and a passive circuit consisting of a combination of i. a maximum time constant limiting resistance ii. and switch means operative in response to a predetermined level of said output signal corresponding to an input signal at the extreme lower end of said range, g. said passive circuit being coupled between said amplifier output means and said signal input means, said switch means being operative to insert said time constant limiting resistance in circuit between said amplifier output means and said signal input means to limit the time constant of the parallel connection of said logarithmic element feedback means and said capacitor feedback means upon occurrence of said predetermined level of said output signal.

Claim 3

A logarithmic amplifier according to claim 1 wherein said logarithmic element feedback means comprises a pair only of logarithmic elements, said logarithmic elements being transistors with the emitter-base junctions of said transistors connected in series, and each of said transistors having its collector connected to its base.

Claim 4

A logarithmic amplifier according to claim 2 including temperature compensation means connected in series with said pair of transistors, said temperature compensation means comprising: h. a further pair of transistors having their emitter-base junctions connected in series with the emitter-base junctions of said first mentioned pair of transistors to provide a first temperature dependent compensating variation in feedback between said amplifier output means and said signal input means (a), and i. temperature dependent resistance means connected to said further pair of transistors to provide a second temperature dependent compensating variation in feedback between said amplifier output means and said signal input means (a).

Claim 5

A logarithmic amplifier according to claim 3 wherein said signal input means (a) is a differential amplifier including a pair of insulated gate field effect transistors as input elements, said input signal being applied to the gate of one of said field effect transistors, and the gate of the other of said field effect transistors being grounded.

Claim 6

A logarithmic amplifier for providing an output voltage proportional to the logarithm of an input current over a range of input currents varying from a predetermined low value at least as low as approximately 10 11 amps to values greater than said predetermined low value, said output voltage having a predetermined level when said input current has said low value, said amplifier comprising: a. signal input means for said input current and including an insulated gate field effect transistor as a current input element, b. an operational amplifier connected to said signal input means, c. a low impedance output amplifier connected to said operational amplifier and having output means for said output voltage, d. feedback means connected between the output means of said output amplifier and said signal input means and comprising: i. attenuator and temperature compensation means connected to said output means, ii. a pair of logarithmic elements connected in series between said means (d) (i) and said signal input means, iii. a time constant capacitor connected in parallel with said logarithmic elements for smoothing out input current fluctuations at said low value, iv. diode switch means connected to said output means and operative in response to occurrence of said predetermined level of said output voltage, v. and a time constant limiting resistance connected between said diode switch means and said signal input means, said diode switch means being operative to connect said resistance between said output means and said signal input means to limit the time constant of the parallel connEction of said logarithmic elements and said time constant capacitor upon occurrence of said predetermined level of said output voltage.

Claim 7

A logarithmic amplifier for providing an output voltage proportional to the logarithm of an input current over a range of input currents varying from a predetermined low value at least as low as approximately 10 11 amps to values greater than said predetermined low value, said output voltage having a predetermined level when said input current has said low value, said amplifier comprising: a. signal input means for said input current and including an insulated gate field effect transistor as a current input element, b. an operational amplifier connected to said signal input means, c. a low impedance output amplifier connected to said operational amplifier and having output means for said output voltage, d. feedback means connected between the output means of said output amplifier and said signal input means and comprising: i. attenuator and temperature compensation means connected to said output means, ii. a pair of logarithmic elements connected in series between said means (d) (i) and said signal input means, iii. a time constant capacitor connected in parallel with said logarithmic elements for smoothing out input current fluctuations at said low value, iv. diode switch means connected to said output means and operative in response to occurrence of said predetermined level of said output voltage, v. and a time constant limiting resistance connected between said diode switch means and said signal input means, said diode switch means being operative to connect said resistance between said output means and said signal input means to limit the time constant of the parallel connEction of said logarithmic elements and said time constant capacitor upon occurrence of said predetermined level of said output voltage.

Claim 8

A logarithmic amplifier according to claim 5 wherein e. said pair of logarithmic elements consist of first and second planar transistors, the collector and base of said first transistor being connected to said signal input means (a) and the collector and base of said second transistor being connected to the emitter of said first transistor, f. and said temperature compensation means includes i. third and fourth transistors of the same type as said first and second transistors, the emitter of said third transistor being connected to the emitter of said second transistor and the emitter of said fourth transistor being connected to the base of said third transistor, said third and fourth transistors providing a first temperature dependent variation in feedback around said feedback means, ii. and temperature sensitive resistance means connected to the base of said fourth transistor to provide a second temperature dependent compensating variation in feedback around said feedback means.