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US3609327A Expired / Lapsed US ⏱️ 0.0 years remaining

Feedback shift register with states decomposed into cycles of equal length

Assignee: National Aeronautics and Space Administration
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Filing: 1969-10-22
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Granted: 1971-09-28
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Expires: 1989-10-22
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Abstract

Abstract A feedback shift register (FSR) comprising a shift register of n stages, with the outputs of selected stages being mod-2 added in a feedback unit. The complement of the unit is fed back to the register''s input stage. The number of outputs, which are fed back, is always odd, equaling a number which is one less than 2, raised to a number representing the number of 1''s in the binary representation of n. The actual stages which are fed back are defined by the exponents of the terms X in the expansion of the term (X+1)n. Such an FSR produces disjointed multistate cycles, each of a length 2i, where

Inventors

  • 👤 Marvin Perlman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 20:56
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/58; G06F7/582; G06F7/584; H; H04; H04L; H04L9/00; H04L9/06; H04L9/065; H04L9/0656; H04L9/0662; G06F2207/00; G06F2207/58; G06F2207/581; G06F2207/583

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 126 words
A feedback shift register comprising: a shift register of n stages arranged in a sequence with the first stage in said sequence representing an input stage, each stage being in either a binary 1 state or a binary 0 state and capable of providing an output indicative of its state; mod-2 adding means coupled to y selected stages of said register, for providing an output representing the complement of the mod-2 addition of the outputs of said y stages, y<n and y being always odd and comprising stages in said sequence which correspond to exponents of terms X in the expansion of the expression (X+1)n; and means for for directly supplying the output of said mod-2 adding means to the input stage of said shift register.
Claim 2
Dependent Claim 126 words
A feedback shift register comprising: a shift register of n stages arranged in a sequence with the first stage in said sequence representing an input stage, each stage being in either a binary 1 state or a binary 0 state and capable of providing an output indicative of its state; mod-2 adding means coupled to y selected stages of said register, for providing an output representing the complement of the mod-2 addition of the outputs of said y stages, y<n and y being always odd and comprising stages in said sequence which correspond to exponents of terms X in the expansion of the expression (X+1)n; and means for for directly supplying the output of said mod-2 adding means to the input stage of said shift register.
Claim 3
Dependent Claim 53 words
The arrangement as recited in claim 1 wherein n is not equal to a power of 2 and whereby the outputs of said n stages define disjointed multiword cycles, where complementary words appear in different cycles, each cycle including 2i words, where i and n are related by the expression 2i 1<n+1< 2i.
Claim 4
Dependent Claim 53 words
The arrangement as recited in claim 1 wherein n is equal to a power of 2 and the outputs of said n stages define multiword cycles, where complementary words appear in the same cycle, 180* apart, and each cycle includes 2i words where n and i are related by the expression, 2i 1<n+1<2i.
Claim 5
Dependent Claim 26 words
The arrangement as recited in claim 1 wherein the output of the highest order stage in said shift register is connected to said mod-2 adding means.
Claim 6
Dependent Claim 33 words
The arrangement as recited in Claim 1 wherein the outputs of said n stages define multiword cycles, each cycle comprising 2i words, where i and n are related by the expression 2i 1<n+1<2i.
Claim 7
Dependent Claim 148 words
A feedback shift register comprising: a shift register of n stages arranged in a sequence with the first stage in said sequence representing an input stage and the stage opposite said input stage in said sequence representing a last stage, each stage being in either a binary 1 state or a binary 0 state and capable of providing an output indicative of its state; mod-2 adding means coupled to y selected stages of said register for providing an output representing the complement of the mod-2 addition of the outputs of said y stages, said y stages including the last stage, y<n, y equaling 1 less than 2 raised to the power of a number which represents the number of 1''s in the binary representation of n; and means for supplying the output of said mod-2 adding means to the input of the input stage of said shift register.
Claim 8
Dependent Claim 148 words
A feedback shift register comprising: a shift register of n stages arranged in a sequence with the first stage in said sequence representing an input stage and the stage opposite said input stage in said sequence representing a last stage, each stage being in either a binary 1 state or a binary 0 state and capable of providing an output indicative of its state; mod-2 adding means coupled to y selected stages of said register for providing an output representing the complement of the mod-2 addition of the outputs of said y stages, said y stages including the last stage, y<n, y equaling 1 less than 2 raised to the power of a number which represents the number of 1''s in the binary representation of n; and means for supplying the output of said mod-2 adding means to the input of the input stage of said shift register.
Claim 9
Dependent Claim 58 words
The arrangement as recited in claim 6 wherein the y stages which are connected to said mod-2 adding means comprise stages in said sequence which correspond to exponents of terms X in the expansion of the expression (X+1)n, in which each expanded expression (X+1)n, in which each expanded expression (X+1)r Xr+1, where r is a power of 2.
Claim 10
Dependent Claim 54 words
The arrangement as recited in claim 7 wherein n is not equal to a power of 2 and whereby the outputs of said n stages define disjointed multiword cycles, where complementary words appear in different cycles, each cycle including 2i words, where i and n are related by the expression 2i 1<n+ 1< 2i.
Claim 11
Dependent Claim 53 words
The arrangement as recited in claim 7 wherein n is equal to a power of 2 and the outputs of said n stage define multiword cycles, where complementary words appear in the same cycle, 180*apart, and each cycle includes 2i words where n and i are related by the expression, 2i 1<n+1< 2i.

References Cited (Backward Citations)

US3162837A Cited
US3398400A Cited
US3155818A Cited
US3471830A Cited
US3475724A Cited
US3484782A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-09-27 1975-03-29 1975-09-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-09-27 1979-03-29 1979-09-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-09-27 1983-03-29 1983-09-28 $7700.00 Window Closed / Lapsed

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