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US3607466A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making semiconductor wafer

Assignee: Sony Corp
•
Filing: 1968-11-21
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Granted: 1971-09-21
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Expires: 1988-11-21
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Abstract

Abstract A semiconductor wafer may be made extremely thin, for example, so as to be suitable for use as a solid target of enhanced sensitivity in a vidicon tube, by forming on the marginal portion of one side of a single crystal semiconductor substrate a seeding site which is crystallographically different from the substrate, coating that one side of the substrate with a vapor growth layer of the same conductivity type as the substrate to consist of a polycrystalline region overlying the seeding site and a single crystal region directly overlying the remainder of that side of the substrate, and then removing the semiconductor substrate from the vapor growth layer, as by grinding, to leave a semiconductor wafer of a thickness substantially determined by the thickness of the vapor growth layer and in which cracks that may originate at the edge of wafer, either during grinding or otherwise, are blocked from spreading into the single crystal region at the boundary of the latter with the marginal polycrystalline region. The semiconductor substrate is preferably of a high impurity type so that the concentration of impurity in the single crystal region of the semiconductor wafer produced as aforesaid increases across the thickness of the wafer in the direction toward the surface thereof from which the substrate has been removed.

Inventors

  • 👤 Masayoshi Miyazaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 21:46
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0112; H10D84/02; H10D84/03; H10D84/038; H10D99/00; H10W; H10W10/00; H10W10/01; H10W10/041; H10W10/40; Y; Y10; Y10S; Y10S148/00; Y10S148/007; Y10S148/051; Y10S148/054; Y10S148/085; Y10S148/122; Y10S438/00; Y10S438/936; Y10S438/977

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 40 words
The method according to claim 1, in which an impurity of opposite conductivity type to said substrate is diffused into said single crystal region of the vapor growth layer to form therein semiconductor elements having at least one PN junction.
Claim 2
Dependent Claim 30 words
The method according to claim 2, in which said impurity is diffused into said single crystal region prior to the removal of said semiconductor substrate from the vapor growth layer.
Claim 3
Dependent Claim 30 words
The method according to claim 2, further comprising the step of forming leads on said semiconductor wafer for interconnection of said semiconductor elements and for external connections to the latter.
Claim 4
Dependent Claim 22 words
The method according to claim 2, in which said seeding site is removed with said semiconductor substrate from said vapor growth layer.
Claim 5
Dependent Claim 42 words
The method according to claim 2, in which said substrate is of a high impurity type so that the impurity concentration in said single crystal region of the vapor growth layer increases across the thickness thereof in the direction toward said substrate.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-09-20 1975-03-22 1975-09-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-09-20 1979-03-22 1979-09-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-09-20 1983-03-22 1983-09-21 $7700.00 Window Closed / Lapsed

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