Single sideband data transmission system

Claim 2

A data transmission system for transmitting digital data occurring at a rate FD, comprising: a first digitally operated symbol generator responsive to the digital data at the rate FD to produce a series of analog waveforms; a second digitally operated symbol generator, responsive to the digital data, for generating, simultaneously with the series of waveforms from the first symbol generator, a series of waveforms which are the Hilbert transform of the waveforms produced by the first symbol generator; means for generating a first carrier signal at a predetermined frequency and phase, and a second carrier signal at the same frequency in quadrature phase relation to the first carrier signal; means for generating third and fourth carrier signals of identical frequency, said third and fourth carrier signals being quadrature related; a first balanced modulator having the output of said first symbol generator and the third carrier signal applied as its modulating input and said first carrier signal applied as its carrier input; a second balanced modulator having the output of said second symbol generator and the fourth carrier signal applied as its modulating input and said second carrier signal as its carrier input; a summing circuit, tHe output of said first balance modulator and the output of said second balance modulator being applied as inputs to said summing circuit, the output of said summing circuit being transmitted as a single sideband suppressed carrier signal transmitting said digital data; the third and fourth carrier signal frequency being offset from the first and second carrier signal frequency by an amount such that modulating the first and second carrier frequency with the offset carrier frequency produces a lower sideband pilot tone at a frequency less than the minimum frequency of the single sideband data signal.

Claim 3

A transmission system in accordance with claim 1 and further including a low-pass filter coupled to the output of said summing circuit for isolating said single sideband suppressed carrier signal.

Claim 4

A data transmission system in accordance with claim 2 wherein said first symbol generator produces a series of output waveforms of the form where t instantaneous time and T 1/FD interval between bits of said digital data.

Claim 5

A transmission system in accordance with claim 1 and further including a receiver and a band limited transmission channel coupled between the output of said summing circuit and said receiver, said receiver comprising, a pilot filter for separating said pilot tone from the received transmitted signal, a first demodulator for recovering said series of analog waveforms from said received transmitted signal, means for coupling said received transmitted signal both to the input of said pilot filter and to the input of said demodulator, means for generating a local offset carrier having a frequency identical to the frequency of said third and fourth carrier signals, a carrier translator for translating said recovered pilot tone upward in frequency by the amount of said offset carrier frequency, said translator having one input from said pilot filter and a second input from said means for generating the offset carrier, the output of said translator being supplied as a synthesized carrier frequency to said demodulator.

Claim 6

A transmission system in accordance with claim 4 wherein said first symbol generator produces a series of output waveforms of the form where T 1/FD and t instantaneous time

Claim 7

A transmission system in accordance with claim 5 including an automatic gain control circuit within said coupling means, the output of said pilot filter being coupled to said automatic gain control circuit to control the amplitude of the signal transmitted to said first demodulator.

Claim 8

A transmission system in accordance with claim 5 wherein said pilot filter is a low-pass filter.

Claim 9

A data transmission system in accordance with claim 5 and further including, a phase locking means in said receiver for maintaining the phase of said synthesized carrier signal in fixed relation to the phase of the received transmission signals, said phase locking system including, a phase adjusting element coupled to said means for generating an offset carrier to adjust the phase of the generated offset carrier, a transition detector for detecting when said received waveform crosses a predetermined voltage level, and means responsive to the output of said transition detector for adjusting the phase of the locally generated offset carrier in a direction tending to maximize the number of crossings occurring at a periodic rate which is an integer multiple of the digital data rate FD.

Claim 10

A data transmission system in accordance with claim 8 wherein said phase locking loop comprises, first and second channels, each of said channels including an auxiliary demodulator having as an input the received transmitted signal, the output of each of said demodulators being connected to a transition detector, the output of each said transition detector being connected thrOugh a narrow band filter having a center frequency at 2FD to respective full wave rectifiers, and phase-shifting means for shifting the synthesized carrier from said translator a small amount in a first direction and applying said phase-shifted carrier as the carrier input to the demodulator in said first channel and for phase shifting said synthesized carrier in the opposite direction and applying said oppositely shifted carrier as the carrier input to the demodulator in said second channel, and a phase control circuit coupled to the output of the full-wave rectifiers in said first and second channels and generating an output signal related to the difference between the out puts from said full-wave rectifiers and applying said control signal to said offset carrier generator to adjust the phase of said offset carrier in a direction to minimize the difference between the outputs from said rectifiers.

Claim 11

A data transmission system for transmitting a series of digital signals of the form a1, a2 ...an, occurring at a predetermined rate FD comprising, means for converting said series of digital signals into a series of control signals of the form b1, b2...bn, wherein bn (an+bn-2) mod. 2, digitally operated means for producing simultaneously a first and second series of analog waveforms, said first series of waveforms having approximately the form where T 1/FD and t instantaneous time and said second series of waveforms being the Hilbert transform of the first series of waveforms, said digitally operated means for producing the analog waveforms comprising, a shift register having a data input, a plurality of sequential storage positions, and clocking means for sequentially shifting an actuating signal at said data input through each of said storage positions; a first series of individual current generating means each connected to one of said storage positions, each of said first series of current generating means producing a specific current signal whenever said actuating signal is at the associated storage position, a first summing terminal for summing all of the current produced by said current generators at any one time, and means for bandlimiting the summed current signal allowing only transmission of baseband components in the frequency region O to FD/2 Hz. said bandlimiting means providing as an output said first series of waveforms, a second series of individual current generating means each connected to one of said storage positions, each of said second series of current generating means producing a specific current signal whenever said actuating signal is at the associated storage position; a second summing terminal for summing all of the currents produced by said second series of current generators at any one time, and means for bandlimiting the summed current signal allowing only transmission of baseband components in the frequency region O to FD/2 Hz., said bandlimiting means providing as an output said second series of waveforms, p1 means for coupling said control signals to the data input of said shift register; means for producing a first carrier signal at a predetermined frequency and phase and a second carrier signal at the same frequency in quadrature phase relation to the first carrier signal, first and second balanced modulators, said first summing terminal being connected as the modulating input to said first balanced modulator and said second summing terminal being connected to the modulating input of said second balanced modulator, said first carrier signal being connected as the carrier signal to said first balanced modulator and said second carrier signal being connected as the carrier signal to said second balanced modulator; and an output summing circuit, the output of said first balanced modulator and the output of said second balanced modulator being applied to inputs to said output summing circuit, the output of said summing circuit being transmitted as a single sideband suppressed carrier signal transmitting said digital data.

Claim 12

A data transmission system for transmitting a series of digital signals of the form a1, a2 ...an, occurring at a predetermined rate FD comprising, means for converting said series of digital signals into a series of control signals of the form b1, b2...bn, wherein bn (an+bn-2) mod. 2, digitally operated means for producing simultaneously a first and second series of analog waveforms, said first series of waveforms having approximately the form where T 1/FD and t instantaneous time and said second series of waveforms being the Hilbert transform of the first series of waveforms, said digitally operated means for producing the analog waveforms comprising, a shift register having a data input, a plurality of sequential storage positions, and clocking means for sequentially shifting an actuating signal at said data input through each of said storage positions; a first series of individual current generating means each connected to one of said storage positions, each of said first series of current generating means producing a specific current signal whenever said actuating signal is at the associated storage position, a first summing terminal for summing all of the current produced by said current generators at any one time, and means for bandlimiting the summed current signal allowing only transmission of baseband components in the frequency region O to FD/2 Hz. said bandlimiting means providing as an output said first series of waveforms, a second series of individual current generating means each connected to one of said storage positions, each of said second series of current generating means producing a specific current signal whenever said actuating signal is at the associated storage position; a second summing terminal for summing all of the currents produced by said second series of current generators at any one time, and means for bandlimiting the summed current signal allowing only transmission of baseband components in the frequency region O to FD/2 Hz., said bandlimiting means providing as an output said second series of waveforms, p1 means for coupling said control signals to the data input of said shift register; means for producing a first carrier signal at a predetermined frequency and phase and a second carrier signal at the same frequency in quadrature phase relation to the first carrier signal, first and second balanced modulators, said first summing terminal being connected as the modulating input to said first balanced modulator and said second summing terminal being connected to the modulating input of said second balanced modulator, said first carrier signal being connected as the carrier signal to said first balanced modulator and said second carrier signal being connected as the carrier signal to said second balanced modulator; and an output summing circuit, the output of said first balanced modulator and the output of said second balanced modulator being applied to inputs to said output summing circuit, the output of said summing circuit being transmitted as a single sideband suppressed carrier signal transmitting said digital data.

Claim 13

A data transmission system in accordance with claim 10 wherein said clocking means provides signals for shifting the actuating signal through each of said storage positions at a rate equal to 4FD and wherein there are 40 of said storage positions.

Claim 14

A data transmission system in accordance with claim 10 and including means for generating third and fourth carrier signals in quadrature relation and having identical frequencies, the frequency of said third and fourth carrier signals being offset from said first and second carrier signal frequency by an amount such that modulating said first and second carrier frequency with said offset carrier frequency produces a lower sideband at a frequency less than the minimum frequency of the single-sideband data signal, said third carrier signal being supplied as a modulating input to said first balanced modulator and said fourth carrier signal being supplied as a modulating input to said second balanced modulator.