US3603981A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digitally controlled ramp generator
Assignee: United States Atomic Energy Commission
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Filing: 1969-10-10
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Granted: 1971-09-07
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Expires: 1989-10-10
Abstract
Abstract In response to the binary outputs of a register containing a binary number capacitive means are selectively connected to the output of a charging source to produce a ramp signal output having a slope proportional to the magnitude of the binary number. A coincidence circuit activates a discharge circuit connected to the capacitive means to terminate the ramp signal output in response to equality between the binary outputs of the register and the binary outputs of a counter accumulating the output of an adjustable clock pulse source.
Inventors
- 👤 David C Rollenhagen
- 👤 Wolfgang J Poppelbaum
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 04:52
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/50
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
252 words
A variable ramp signal generator, comprising: register means for storing a binary number and producing an output representative of the binary value of each digit of said binary member; capacitive means having predetermined capacitance values; a current source; switch means responsive to the output of said register means for selectively connecting said capacitive means to said current source to charge said capacitive means, thereby producing said ramp signal; a source of clock pulses; counter means connected to said source of clock pulses for advancing said counter from a predetermined initial count and producing an output representative of the accumulated count therein; coincidence means receiving the outputs of said register means and said counter means for producing an output pulse in response to equality therebetween; control means for discharging said capacitive means in response to said output pulse, said control means including, a source producing a reference potential; differential comparator means receiving said reference potential and the voltage across said capacitive means for producing an output pulse in response to equality therebetween; bistable means including a first input for setting said bistable means to a first stable state in response to the output pulse of said coincidence means, a second input for setting said bistable means to a second stable state in response to the output pulse of said differential comparator means, and an output representative of said first stable state; and gating means connected to said capacitive means for discharging said capacitive means in response to said output of said bistable means.
Claim 2
Dependent Claim
252 words
A variable ramp signal generator, comprising: register means for storing a binary number and producing an output representative of the binary value of each digit of said binary member; capacitive means having predetermined capacitance values; a current source; switch means responsive to the output of said register means for selectively connecting said capacitive means to said current source to charge said capacitive means, thereby producing said ramp signal; a source of clock pulses; counter means connected to said source of clock pulses for advancing said counter from a predetermined initial count and producing an output representative of the accumulated count therein; coincidence means receiving the outputs of said register means and said counter means for producing an output pulse in response to equality therebetween; control means for discharging said capacitive means in response to said output pulse, said control means including, a source producing a reference potential; differential comparator means receiving said reference potential and the voltage across said capacitive means for producing an output pulse in response to equality therebetween; bistable means including a first input for setting said bistable means to a first stable state in response to the output pulse of said coincidence means, a second input for setting said bistable means to a second stable state in response to the output pulse of said differential comparator means, and an output representative of said first stable state; and gating means connected to said capacitive means for discharging said capacitive means in response to said output of said bistable means.
Claim 3
Dependent Claim
39 words
The device according to claim 1 wherein said capacitive means comprises a plurality of capacitors having one side thereof connected in common to said charging source and having the other side thereof connected to one of said switch means.
Claim 4
Dependent Claim
44 words
The device according to claim 2 wherein said plurality of capacitors are each associated with one digit of said binary number and wherein each of said capacitors have capacitance values weighted according to the numerical value of the associated digits of said binary number.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-06 | 1975-03-08 | 1975-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-06 | 1979-03-08 | 1979-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-06 | 1983-03-08 | 1983-09-07 | $7700.00 | Window Closed / Lapsed |