US3603894A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stacked differential amplifiers
Assignee: Motorola Solutions Inc
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Filing: 1969-08-08
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Granted: 1971-09-07
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Expires: 1989-08-08
Abstract
Abstract A cascaded train of transistor differential amplifier circuits are operated with a single primary constant current source connected to the first amplifier of the train. The constant current sources for each of the other differential amplifiers are obtained by recombining the signals present on the collectors of the transistors in the next preceding amplifier in common to the emitters of each of the transistors in the subsequent differential amplifier stage.
Inventors
- 👤 Gildo Cecchin
- 👤 Francis H Hilbert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 05:17
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/68; H03F3/45; H03F3/45071
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
274 words
An amplifier circuit including in combination: at least two differential amplifiers each including a pair of amplifier elements, each amplifier element having input, output and third electrodes; a first active current source connected in common with the third electrodes of the amplifier elements of one of the differential amplifiers; first load resistance means connected between the output electrode of one of the amplifier elements of said one differential amplifier and the third electrodes of the amplifier elements of the other differential amplifier; first circuit means coupling the output electrode of the other amplifier element of said one differential amplifier with the third electrodes of the amplifier elements of the other differential amplifier, the first circuit means and the first load resistance means together acting as a second current source for said other differential amplifier; first signal input means for applying first input signals to the input electrodes of the amplifier elements of said one differential amplifier to vary the relative conductivity of the amplifier elements to which the first input signals are applied; second signal input means for applying second input signals to the amplifier elements of said other differential amplifier to vary the relative conductivity of the amplifier elements to which the second input signals are applied; first and second DC supply terminals; second load resistance means connecting the first supply terminal with the output electrode of one of the amplifier elements of said other differential amplifier; second circuit means connecting the first DC supply terminal with the output electrode of the other amplifier element of said other differential amplifier; and means connecting the first current source with the second DC supply terminal.
Claim 2
Dependent Claim
274 words
An amplifier circuit including in combination: at least two differential amplifiers each including a pair of amplifier elements, each amplifier element having input, output and third electrodes; a first active current source connected in common with the third electrodes of the amplifier elements of one of the differential amplifiers; first load resistance means connected between the output electrode of one of the amplifier elements of said one differential amplifier and the third electrodes of the amplifier elements of the other differential amplifier; first circuit means coupling the output electrode of the other amplifier element of said one differential amplifier with the third electrodes of the amplifier elements of the other differential amplifier, the first circuit means and the first load resistance means together acting as a second current source for said other differential amplifier; first signal input means for applying first input signals to the input electrodes of the amplifier elements of said one differential amplifier to vary the relative conductivity of the amplifier elements to which the first input signals are applied; second signal input means for applying second input signals to the amplifier elements of said other differential amplifier to vary the relative conductivity of the amplifier elements to which the second input signals are applied; first and second DC supply terminals; second load resistance means connecting the first supply terminal with the output electrode of one of the amplifier elements of said other differential amplifier; second circuit means connecting the first DC supply terminal with the output electrode of the other amplifier element of said other differential amplifier; and means connecting the first current source with the second DC supply terminal.
Claim 3
Dependent Claim
90 words
The combination according to claim 1 wherein the amplifier elements of the differential amplifiers are transistors, each having base, collector, and emitter electrodes corresponding respectively to the input, output, and third electrodes, and wherein the collector electrodes of each of the transistors in said one differential amplifier are connected through respective load resistors to the emitter electrodes of the transistors of said other differential amplifier, and the collector electrodes of each of the transistors in said other differential amplifier are connected through respective load resistors to the first supply terminal.
Claim 4
Dependent Claim
259 words
An amplifier circuit including in combination: a cascade of n differential amplifier circuits where n is a positive integer greater than 1, each of said differential amplifier circuits including first and second transistors, each of which has base, collector, and emitter electrodes; first and second load resistors connected to the collectors of the first and second transistors in each of said differential amplifier circuits; a constant current source connected in common to the emitter electrodes of a first one of the differential amplifiers; means connecting the first and second load resistors of the first one of the differeNtial amplifiers and of each of the subsequent differential amplifiers except the nth in common to the emitters of the transistors in the next differential amplifier in the cascade to act as a constant current source for said next differential amplifier; first and second DC supply terminals; means connecting the first and second load resistors of the nth differential amplifier in the cascade to the DC supply terminal; means coupling the constant current source with the second (FL 27) DC supply terminal; means for applying DC biasing potentials to the bases of the transistors in each of the differential amplifiers; means for applying input signals to the bases of the transistors in each of the differential amplifiers to vary the relative conductivity of the transistors in each of said differential amplifiers in accordance with variations in the input signals applied to the bases thereof; and means for obtaining independent outputs from the collectors of the transistors in each of the differential amplifiers.
Claim 5
Dependent Claim
259 words
An amplifier circuit including in combination: a cascade of n differential amplifier circuits where n is a positive integer greater than 1, each of said differential amplifier circuits including first and second transistors, each of which has base, collector, and emitter electrodes; first and second load resistors connected to the collectors of the first and second transistors in each of said differential amplifier circuits; a constant current source connected in common to the emitter electrodes of a first one of the differential amplifiers; means connecting the first and second load resistors of the first one of the differeNtial amplifiers and of each of the subsequent differential amplifiers except the nth in common to the emitters of the transistors in the next differential amplifier in the cascade to act as a constant current source for said next differential amplifier; first and second DC supply terminals; means connecting the first and second load resistors of the nth differential amplifier in the cascade to the DC supply terminal; means coupling the constant current source with the second (FL 27) DC supply terminal; means for applying DC biasing potentials to the bases of the transistors in each of the differential amplifiers; means for applying input signals to the bases of the transistors in each of the differential amplifiers to vary the relative conductivity of the transistors in each of said differential amplifiers in accordance with variations in the input signals applied to the bases thereof; and means for obtaining independent outputs from the collectors of the transistors in each of the differential amplifiers.
Claim 6
Dependent Claim
16 words
The combination according to claim 1 wherein the first current source is a constant current source.
Claim 7
Dependent Claim
71 words
The combination according to claim 1 further including means for supplying a DC biasing potential to the bases of the transistors in said other differential amplifier, and means interconnecting each of the collectors of the transistors of said other differential amplifier with the corresponding bases of the transistors of said one differential amplifier for establishing a DC operating bias and a signal input for the transistors of said one differential amplifier.
References Cited (Backward Citations)
US3474440A
Cited
US3497824A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-06 | 1975-03-08 | 1975-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-06 | 1979-03-08 | 1979-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-06 | 1983-03-08 | 1983-09-07 | $7700.00 | Window Closed / Lapsed |