US3602896A
Expired / Lapsed
US
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Random access memory with flexible data boundaries
Assignee: International Business Machines Corp
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Filing: 1969-06-30
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Granted: 1971-08-31
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Expires: 1989-06-30
Abstract
Abstract A multiword random access memory wherein each memory word comprises a plurality of distinct addressable sections or bytes. Controls are provided to allow the addressing of a given data word stored in memory having up to M addressable bytes wherein said data word may be addressed beginning on any byte of a memory word. Thus, an accessed data word may overlap one memory word boundary into an adjacent memory word. Appropriate word drive line rotation circuitry is provided in order that the proper drive lines be addressed in a single access cycle.
Inventors
- 👤 David Zeheb
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 02:23
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/04
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
144 words
An addressable random access memory system including a memory per se, address and data register means, said memory being organized so that each memory word consists of M bytes, and said memory is organized in M separately addressable sections, each byte being in a different section, said memory system including means for accessing a data word of up to M bytes beginning at any specified byte within a given memory word, means in said memory address register for specifying the particular byte location and the section at which a given data word access is to begin, means for energizing the proper drive lines of each section of said memory for concurrently accessing in a single memory access cycle only those bytes specified, even though said bytes are in adjacent memory words, and means for storing the accessed data word in said data register means.
Claim 2
Dependent Claim
144 words
An addressable random access memory system including a memory per se, address and data register means, said memory being organized so that each memory word consists of M bytes, and said memory is organized in M separately addressable sections, each byte being in a different section, said memory system including means for accessing a data word of up to M bytes beginning at any specified byte within a given memory word, means in said memory address register for specifying the particular byte location and the section at which a given data word access is to begin, means for energizing the proper drive lines of each section of said memory for concurrently accessing in a single memory access cycle only those bytes specified, even though said bytes are in adjacent memory words, and means for storing the accessed data word in said data register means.
Claim 3
Dependent Claim
44 words
A random access memory system as set forth in claim 1 wherein said means for concurrently accessing desired byte locations in said distinct sections comprises means for combining the word address of the first byte to be accessed and the byte address per se.
Claim 4
Dependent Claim
33 words
A random access memory as set forth in claim 1 including means for serially connecting all drive lines for a particular coordinate in each section in the memory to a single drive source.
Claim 5
Dependent Claim
48 words
A random access memory as set forth in claim 3 wherein each section of said memory has the same number of addressable byte storage locations and the same number of drive lines therefor and means for energizing selected drive lines in each section for desired memory accessing operations.
Claim 6
Dependent Claim
59 words
A random access memory as set forth in claim 4 wherein a given byte in each section is accessed by energizing the appropriate X and Y drive lines concurrently said system including decoding means operable in response to a memory address for selecting particular X and Y drive lines for accessing the first byte of a particular memory access.
Claim 7
Dependent Claim
79 words
A random access memory as set forth in claim 5 including logic means operable under control of the word address and byte address for determining if the X and Y access in a particular section of memory is to occur at the word address specified or whether this word address must be effectively incremented by one, and means for incrementing said word address upon a signal from said determining means for selecting the proper X and Y drive lines.
Claim 8
Dependent Claim
59 words
A random access memory as set forth in claim 6 including gate means for selectively interconnecting both the X and Y drive lines of each memory section in order that each of the X and Y drive currents provide the necessary half select pulse to only those byte locations in each section of memory which are to be accessed.
Claim 9
Dependent Claim
57 words
A random access memory as set forth in claim 7 wherein said gates are bidirectional, the particular direction of current flow therethrough being determined by whether a specified operation is read or a write access and wherein the same decoding logical circuitry may be utilized for both a read and a write access cycle in said memory.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-30 | 1975-03-01 | 1975-08-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-30 | 1979-03-01 | 1979-08-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-30 | 1983-03-01 | 1983-08-31 | $7700.00 | Window Closed / Lapsed |