Error correcting and detecting systems

Abstract

Abstract A single error correcting system for correcting messages of any number of data bits comprises encoding means and decoding means. The encoding means adds r check bits, each check bit representative of at most r-1 data bits and, on the average, each check bit representative of >r/2 data bits; each check bit is representative of no more than one common data bit; and each data bit is represented by exactly two check bits. The decoding means for each data bit has an error correcting circuit receiving three inputs from input circuitry, one input being the data bit itself and the other two inputs being combinations, respectively, of one of the two check bits and other data bits representative of the received data bit. The error correcting circuit is capable of producing an output correctly corresponding to the data bit if no more than one input thereto was in error. A double error detecting system, useful with this single error correcting system, inputs syndrome bits representative of each check bit and of an added parity bit to an OR circuit and to an ADDER circuit, and compares the output from these circuits.

Inventors

• 👤 Mu-Yue Hsiao

Bibliographic Details