US3601669A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated heater element array and drive matrix therefor
Assignee: Texas Instruments Inc
•
Filing: 1969-05-07
•
Granted: 1971-08-24
•
Expires: 1989-05-07
Abstract
Abstract Thermal display including an air isolated integrated semiconductor circuit forming a semiconductor heater element array joined by a metallic connecting pattern which extends out over the heating elements to interconnect selected ones of them and a PN junction isolated integrated semiconductor drive matrix for the heating element array positioned in the same plane as the heating element array. The PN junction isolated integrated semiconductor drive matrix and the semiconductor heating element array are concurrently formed in the same semiconductor substrate and the heating element array is air isolated to provide a high degree of electrical and thermal isolation for the heating element array while both are located in the same plane on a larger support. The thermally sensitive material on which a dynamic display is formed or on which a permanent display is printed is in direct contact with the monocrystalline semiconductor material of the heating element array and can be passed over the heating element array and the drive matrix.
Inventors
- 👤 Jerry D Merryman
- 👤 Edward M Ruggiero
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 05:19
CPC Classifications
H; H05; H05B; H05B3/00; H10; H10D; H10D99/00
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
181 words
An integrated semiconductor circuit comprising an insulating substrate, a semiconductor wafer having one face mounted on said insulating substrate by an insulating adhesive, said semiconductor wafer comprising a plurality of physically separated wafer parts forming an array located in a first area of said wafer, said wafer parts respectively comprising heat dissipative elements at said one face, said heat dissipative elements being electrically and thermally isolated from one another by the physical separation of said wafer parts, said semiconductor wafer comprising a plurality of circuit elements formed at said one face and located in a spaced second area of said semiconductor wafer, the number of said plurality of circuit elements being at least as large as the number of said plurality of heat dissipative elements, PN junctions in said second area of said semiconductor wafer electrically isolating said plurality of circuit elements from one another through the semiconductor material, said second area of said semiconductor wafer being integral throughout, and conductive means located between said one face and said insulating substrate electrically interconnecting said head dissipative elements and said circuit elements.
Claim 2
Dependent Claim
181 words
An integrated semiconductor circuit comprising an insulating substrate, a semiconductor wafer having one face mounted on said insulating substrate by an insulating adhesive, said semiconductor wafer comprising a plurality of physically separated wafer parts forming an array located in a first area of said wafer, said wafer parts respectively comprising heat dissipative elements at said one face, said heat dissipative elements being electrically and thermally isolated from one another by the physical separation of said wafer parts, said semiconductor wafer comprising a plurality of circuit elements formed at said one face and located in a spaced second area of said semiconductor wafer, the number of said plurality of circuit elements being at least as large as the number of said plurality of heat dissipative elements, PN junctions in said second area of said semiconductor wafer electrically isolating said plurality of circuit elements from one another through the semiconductor material, said second area of said semiconductor wafer being integral throughout, and conductive means located between said one face and said insulating substrate electrically interconnecting said head dissipative elements and said circuit elements.
Claim 3
Dependent Claim
38 words
An integrated semiconductor circuit according to claim 1, wherein the opposite face of said semiconductor wafer is essentially planar, said semiconductor wafer is rectangular in shape and at least two parallel sides of said semiconductor wafer are integral.
Claim 4
Dependent Claim
26 words
A semiconductor integrated circuit according to claim 1, wherein said second area of said semiconductor wafer is larger than said first area of said semiconductor wafer.
Claim 5
Dependent Claim
33 words
An integrated semiconductor circuit according to claim 3, wherein the number of said plurality of circuit elements is at least twice as large as the number of said plurality of heat dissipative elements.
Claim 6
Dependent Claim
20 words
An integrated semiconductor circuit according to claim 2, wherein the other two parallel sides of said semiconductor wafer are integral.
Claim 7
Dependent Claim
35 words
An integrated semiconductor circuit according to claim 1, wherein said conductive means comprises a plurality of diffused conductive tunnels in said one face of said semiconductor wafer between said first area and said second area.
Claim 8
Dependent Claim
173 words
An integrated semiconductor circuit, comprising an insulating substrate, a smaller semiconductor wafer having one face mounted on said insulating substrate by an insulating adhesive, said semiconductor wafer comprising a plurality of physically separated wafer parts forming an array located in a first area of said wafer, said wafer parts respectively comprising diffused resistors at said one face, said diffused resistors being electrically and thermally isolated from one another by the physical separation of said wafer parts, said semiconductor wafer comprising a plurality of transistors formed at said one face and located in a larger spaced second area of said semiconductor wafer, the number of said transistors being at least as large as the number of said diffused resistors, PN junctions in said second area of said semiconductor wafer electrically isolating and transistors from one another through the semiconductor material, said second area of said semiconductor wafer being integral throughout, and conductive means located between said one face and said insulating substrate electrically interconnecting said resistors and said transistors for selectively energizing said resistors.
Claim 9
Dependent Claim
173 words
An integrated semiconductor circuit, comprising an insulating substrate, a smaller semiconductor wafer having one face mounted on said insulating substrate by an insulating adhesive, said semiconductor wafer comprising a plurality of physically separated wafer parts forming an array located in a first area of said wafer, said wafer parts respectively comprising diffused resistors at said one face, said diffused resistors being electrically and thermally isolated from one another by the physical separation of said wafer parts, said semiconductor wafer comprising a plurality of transistors formed at said one face and located in a larger spaced second area of said semiconductor wafer, the number of said transistors being at least as large as the number of said diffused resistors, PN junctions in said second area of said semiconductor wafer electrically isolating and transistors from one another through the semiconductor material, said second area of said semiconductor wafer being integral throughout, and conductive means located between said one face and said insulating substrate electrically interconnecting said resistors and said transistors for selectively energizing said resistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-23 | 1975-02-22 | 1975-08-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-23 | 1979-02-22 | 1979-08-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-23 | 1983-02-22 | 1983-08-24 | $7700.00 | Window Closed / Lapsed |