US3601636A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Single-shot device
Assignee: DECISION DATA Inc A CORP OF
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Filing: 1969-06-23
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Granted: 1971-08-24
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Expires: 1989-06-23
Abstract
Abstract A single-shot device having two NAND gates which are interconnected to provide an output signal in response to an input signal. The output signal remains for a predetermined duration until the output signal of one NAND gate is applied through a delay to the other NAND gate. The delay comprises a transient network which performs an integrating function and contains a series connected resistor and a parallel connected capacitor.
Inventors
- 👤 Lynn W Marsh Jr
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 20:12
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/033
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
129 words
An apparatus comprising: a. a plurality of identical logic circuits, each having two inputs and an output and being responsive to input signals to produce an output signal having a predetermined relationship to the input signals; b. means for applying an input signal to one of the inputs of a first one of the logic circuits; c. means for connecting the output of the first one to an input of a second one of the logic circuits; d. means for connecting the output of the second one to the remaining input of the first one of the logic circuits; and e. means for connecting the output of the first one through a circuit including an integrating network to the remaining input of the second one of the logic circuits.
Claim 2
Independent Claim
129 words
An apparatus comprising: a. a plurality of identical logic circuits, each having two inputs and an output and being responsive to input signals to produce an output signal having a predetermined relationship to the input signals; b. means for applying an input signal to one of the inputs of a first one of the logic circuits; c. means for connecting the output of the first one to an input of a second one of the logic circuits; d. means for connecting the output of the second one to the remaining input of the first one of the logic circuits; and e. means for connecting the output of the first one through a circuit including an integrating network to the remaining input of the second one of the logic circuits.
Claim 3
Dependent Claim
39 words
The apparatus as recited in claim 1 wherein the circuit including an integrating network comprises a third logic circuit having two inputs connected to the integrating network and an output connected to an input of the second logic circuit.
Claim 4
Dependent Claim
15 words
The apparatus as recited in claim 2 wherein all the logic circuits are NAND gates.
Claim 5
Independent Claim
153 words
An apparatus comprising: a. first and second logic circuits, each having two inputs and an output and being responsive to input signals to produce an output signal having a predetermined relationship to the input signals; b. means for applying an input signal to one of the inputs of the first logic circuit; c. first means for connecting the output of the first logic circuit to an input of the second logic circuit; d. second means for connecting the output of the second logic circuit to the remaining input of the first logic circuit; and e. third means for connecting the output of the first logic circuit to the remaining input of the second logic circuit, the third connecting means including a delay circuit adapted to receive an output signal from the first logic circuit and to apply an input signal to the remaining input of the second logic circuit a predetermined time thereafter.
Claim 6
Independent Claim
153 words
An apparatus comprising: a. first and second logic circuits, each having two inputs and an output and being responsive to input signals to produce an output signal having a predetermined relationship to the input signals; b. means for applying an input signal to one of the inputs of the first logic circuit; c. first means for connecting the output of the first logic circuit to an input of the second logic circuit; d. second means for connecting the output of the second logic circuit to the remaining input of the first logic circuit; and e. third means for connecting the output of the first logic circuit to the remaining input of the second logic circuit, the third connecting means including a delay circuit adapted to receive an output signal from the first logic circuit and to apply an input signal to the remaining input of the second logic circuit a predetermined time thereafter.
Claim 7
Dependent Claim
15 words
The apparatus as recited in claim 4 wherein the delay circuit comprises an integrating network.
Claim 8
Dependent Claim
38 words
The apparatus as recited in claim 5 wherein the third connecting means further comprises a third logic circuit having two inputs connected to the integrating network and an output connected to an input of the second logic circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-23 | 1975-02-22 | 1975-08-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-23 | 1979-02-22 | 1979-08-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-23 | 1983-02-22 | 1983-08-24 | $7700.00 | Window Closed / Lapsed |