US3597693A
Expired / Lapsed
US
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Nonlinear decoder
Assignee: International Standard Electric Corp
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Filing: 1968-03-01
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Granted: 1971-08-03
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Expires: 1988-03-01
Abstract
Abstract A decoder having a sinh expansion characteristic rather than the normal logarithmic characteristic is described. The code input is converted to a pulse width modulated (PWM) signal of either positive or negative polarity, as indicated by the condition of the most significant digit, having a width t proportional to the numerical value represented by the code input. The PWM signal then controls the charging of a capacitor for time t. The capacitor then is discharged from time t to a fixed time T at which time the capacitor is sampled to provide the decoder output.
Inventors
- 👤 Joseph Hood Mcneilly
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 09:06
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/10; H03M1/1009
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
155 words
A nonlinear decoder comprising: a source of binary code signal representing a numerical value; first means coupled to said source to convert said binary code signal to a pulse width modulated signal having a width proportional to said numerical value and to generate a first nonlinear waveform in response to said pulse width modulated signal, said first waveform having a fixed initial amplitude and varying therefrom according to a first given law for a first time proportional to the width of said pulse width modulated signal; second means coupled to said first means for generating a second nonlinear waveform having an initial amplitude determined by the amplitude of said first waveform at said first time and varying therefrom according to a second given law; and third means coupled to said second means to sample said Second waveform at a second time greater than said first time to provide an amplitude modulated output for said decoder.
Claim 2
Dependent Claim
155 words
A nonlinear decoder comprising: a source of binary code signal representing a numerical value; first means coupled to said source to convert said binary code signal to a pulse width modulated signal having a width proportional to said numerical value and to generate a first nonlinear waveform in response to said pulse width modulated signal, said first waveform having a fixed initial amplitude and varying therefrom according to a first given law for a first time proportional to the width of said pulse width modulated signal; second means coupled to said first means for generating a second nonlinear waveform having an initial amplitude determined by the amplitude of said first waveform at said first time and varying therefrom according to a second given law; and third means coupled to said second means to sample said Second waveform at a second time greater than said first time to provide an amplitude modulated output for said decoder.
Claim 3
Dependent Claim
12 words
A decoder according to claim 1 wherein said second time is fixed.
Claim 4
Dependent Claim
22 words
A decoder according to claim 1, wherein said first waveform is an exponentially rising waveform having an initial amplitude equal to zero.
Claim 5
Dependent Claim
15 words
A decoder according to claim 1, wherein said second waveform is an exponentially falling waveform.
Claim 6
Dependent Claim
31 words
A decoder according to claim 1, wherein said first waveform is an exponentially rising waveform having an initial amplitude equal to zero, and said second waveform is an exponentially falling waveform.
Claim 7
Dependent Claim
75 words
A decoder according to claim 1, wherein said first means includes a capacitor, and fourth means coupled to said source and said capacitor, said fourth means converting said binary code signal to said pulse width modulated signal to charge said capacitor for a time equal to said first time; and said second means includes fifth means coupled to said capacitor to discharge said capacitor for a time from said first time to said second time.
Claim 8
Dependent Claim
12 words
A decoder according to claim 6, wherein said second time is fixed.
Claim 9
Dependent Claim
65 words
A decoder according to claim 6, wherein said fourth means includes fifth means coupled to said source to convert said binary code signal into a width modulated pulse having a width proportional to said numerical value represented by said binary code signal, and sixth means to couple said width modulated pulse from said fifth means to said capacitor to control the charging of said capacitor.
Claim 10
Dependent Claim
71 words
A decoder according to claim 8, wherein said fifth means includes a binary shift register coupled to said source to store said binary code signal, a binary counter coupled to said shift register to receive the digits stored in said shift register, means coupled to said counter to step said counter until the count therein is reduced to zero, and means coupled to said counter to produce said width modulated pulse.
Claim 11
Dependent Claim
12 words
A decoder according to claim 9, wherein said second time is fixed.
References Cited (Backward Citations)
US3191065A
Cited
US3480948A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-02 | 1975-02-01 | 1975-08-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-02 | 1979-02-01 | 1979-08-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-02 | 1983-02-01 | 1983-08-03 | $7700.00 | Window Closed / Lapsed |