US3597626A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Threshold logic gate
Assignee: AT&T Inc
•
Filing: 1969-04-01
•
Granted: 1971-08-03
•
Expires: 1989-04-01
Abstract
Abstract The dichotomy presented in threshold logic gates by the desirability of a large gap or unit step near the threshold point, coupled with the desirability of a small overall signal swing on the threshold element for a large fan-in, is minimized by replacing the usual linear summing resistor with a nonlinear variable impedance element, such as a field effect transistor in one illustrative embodiment, having a low impedance below the gate threshold and a high impedance in the gap.
Inventors
- 👤 John D Heightley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 15:51
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/30; H03K17/302; H03K19/00; H03K19/02; H03K19/08; H03K19/0813; H03K19/094; H03K19/0944; H03K19/09441
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
133 words
A threshold logic gate comprising a signal combining point; a plurality of input means for providing respective input signals to said point; threshold means connected to said point, said threshold means providing an output signal responsive to a first sum of said input signals; and variable impedance means connected to said point, said variable impedance means normally presenting a low impedance to said point and operative for presenting a high impedance to said point responsive to a second sum of said input signals, said second sum being less than said first sum, said variable impedance means comprising first and second impedance paths including first and second resistors respectively, and switching means operative in one of said paths for selectively connecting at least one of said first and second impedance paths to said point.
Claim 2
Dependent Claim
133 words
A threshold logic gate comprising a signal combining point; a plurality of input means for providing respective input signals to said point; threshold means connected to said point, said threshold means providing an output signal responsive to a first sum of said input signals; and variable impedance means connected to said point, said variable impedance means normally presenting a low impedance to said point and operative for presenting a high impedance to said point responsive to a second sum of said input signals, said second sum being less than said first sum, said variable impedance means comprising first and second impedance paths including first and second resistors respectively, and switching means operative in one of said paths for selectively connecting at least one of said first and second impedance paths to said point.
Claim 3
Dependent Claim
137 words
A threshold logic gate comprising a signal combining point; a plurality of input means for applying respective input signals to said point, said input means each including a current source comprising a field effect transistor; variable impedance means connected to said point for providing a low impedance when less than a predetermined total of input signal units is applied to said point and for providing a high impedance when greater than said predetermined total of input signal units is applied to said point; said variable impedance means comprising a field effect transistor and biasing means for providing a substantially constant voltage difference between the gate and source of said field effect transistor; and threshold means connected to said point for providing an output signal responsive to a total of input signal units greater than said predetermined total.
Claim 4
Dependent Claim
137 words
A threshold logic gate comprising a signal combining point; a plurality of input means for applying respective input signals to said point, said input means each including a current source comprising a field effect transistor; variable impedance means connected to said point for providing a low impedance when less than a predetermined total of input signal units is applied to said point and for providing a high impedance when greater than said predetermined total of input signal units is applied to said point; said variable impedance means comprising a field effect transistor and biasing means for providing a substantially constant voltage difference between the gate and source of said field effect transistor; and threshold means connected to said point for providing an output signal responsive to a total of input signal units greater than said predetermined total.
References Cited (Backward Citations)
US3201703A
Cited
US3191057A
Cited
US3299291A
Cited
US3260863A
Cited
US3471712A
Cited
US3445680A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-08-02 | 1975-02-01 | 1975-08-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-08-02 | 1979-02-01 | 1979-08-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-08-02 | 1983-02-01 | 1983-08-03 | $7700.00 | Window Closed / Lapsed |