Claims Analysis
Total Claims: 50
Claim 1
Independent Claim
229 words
Digitalized tone generating means comprising, in combination: closed loop circuit means for circulating therearound, at a circulating rate fs, at least one phase word comprises of a serial stream of M data bits, and comprising: delay line means constructed to shift said data bits therealong in response to clock pulses supplied thereto at a rate f0; and first incrementing means connected in series with said delay line means; clock pulse source means having an output signal supplied to said delay line means to shift data bits therethrough at said f0 rate; said first incrementing means constructed to generate a binary increment K1 each Nth circulation of said phase word around said closed loop circuit means and to add said binary increments K1 to said circulating phase word to produce a sequence of binary words circulating in said closed loop circuit means, each binary word having a value representing a specific phase angle of the tone being generated; output means constructed to receive each binary word each Rth circulation thereof in said closed loop circuit means, where R is an integer of a value at least as great as one; and converting means responsive to each of said binary words received in said output means to generate a signal representative of that amplitude of the tone being generated which corresponds to the phase angle represented by said each binary word.
Claim 2
Dependent Claim
229 words
Digitalized tone generating means comprising, in combination: closed loop circuit means for circulating therearound, at a circulating rate fs, at least one phase word comprises of a serial stream of M data bits, and comprising: delay line means constructed to shift said data bits therealong in response to clock pulses supplied thereto at a rate f0; and first incrementing means connected in series with said delay line means; clock pulse source means having an output signal supplied to said delay line means to shift data bits therethrough at said f0 rate; said first incrementing means constructed to generate a binary increment K1 each Nth circulation of said phase word around said closed loop circuit means and to add said binary increments K1 to said circulating phase word to produce a sequence of binary words circulating in said closed loop circuit means, each binary word having a value representing a specific phase angle of the tone being generated; output means constructed to receive each binary word each Rth circulation thereof in said closed loop circuit means, where R is an integer of a value at least as great as one; and converting means responsive to each of said binary words received in said output means to generate a signal representative of that amplitude of the tone being generated which corresponds to the phase angle represented by said each binary word.
Claim 3
Dependent Claim
103 words
Digitalized tone generating means in accordance with claim 1 comprising: counting means responsive to the output pulses from said clock pulse source means to produce a first output signal which counts and identifies the time sloT of each of said M data bits of said phase word as said each data bit enters said first incrementing means: and in which said first incrementing means is responsive to said first output signal of said counting means to add each bit of said binary increment K1 to each bit of corresponding order of magnitude of said phase word as it enters said first incrementing means.
Claim 4
Dependent Claim
103 words
Digitalized tone generating means in accordance with claim 1 and comprising: second incrementing means connected in series with said delay line means and said first incrementing means in said closed loop circuit means; said second incrementing means responsive to the data from said source of input data to generate a second binary increment K2 having a value that is determined in accordance with the nature of said input data and to add said second binary increment K2 to said circulating phase word to advance the phase of the tone represented by said phase word, which is comprised of said sequence eof binary words.
Claim 5
Dependent Claim
103 words
Digitalized tone generating means in accordance with claim 3 comprising: counting means responsive to the output pulses from said clock pulse source means to produce a first output signal which counts and identifies the time slot of each of said M data bits of said phase word as said each data bit enters said first incrementing means; and in which said first incrementing means is responsive to said first output signal of said counting means to add each bit of said binary increment K1 to each bit of corresponding order of magnitude of said phase word as it enters said first incrementing means.
Claim 6
Dependent Claim
102 words
Digitalized tone generating means in accordance with claim 4 in which: said counting means is further responsive to the output pulses from said clock pulse source to produce a second output signal which counts and identifies each of the M data bits of said phase words as said data bits enter said second increment generating means; and in which said second incrementing means is responsive to said second output signal of said counting means to add each bit of said binary increment K2 to the bit of corresponding order of magnitude of said phase word as it enters said second incrementing means.
Claim 7
Dependent Claim
81 words
Digitalized tone generating means in accordance with claim 1 in which said delay line means has a capacity to hold at least two of said phase words and comprising: counting means responsive to the output pulses from said clock pulse source means to identify each of said phase words as it circulates within said closed loop circuit means and to identify the time slot occupied by each bit of each word as said bits circulate in said closed loop circuit means.
Claim 8
Dependent Claim
66 words
Digitalized tone generating means in accordance with claim 6 in which said first incrementing means is constructed to respond to a first output signal of said counting means to add a unique and different binary increment K1 to each of said two or more phase words as said two or more phase words circulate through said closed loop circuit means and through said first incrementing means.
Claim 9
Dependent Claim
120 words
Digitalized tone generating means in accordance with claim 7 and comprising: second incrementing means connected in series with said delay line means and said first incrementing means in said closed loop circuit means; said second incrementing means responsive to the data from said source of input data to generate for each of said two or more phase words, at predetermined periodic intervals, a corresponding second binary increment K2 having a value that is determined in accordance with the nature of said input data, and to add said second binary increments K2 to said circulating phase words to advance the phase of the tones represented by said phase words, which are each comprised of one of said sequence of binary words.
Claim 10
Dependent Claim
102 words
Digitalized tone generating means in accordance with claim 8 in which: said counting means is further responsivE to the output pulse from said clock pulse source to produce a second output signal which counts and identifies each of the M data bits of said phase words as said data bits enter said second incrementing means; and in which said second incrementing means is responsive to said second output signal of said counting means to add each bit of each binary increment K2 to the bit of corresponding order of magnitude of the corresponding phase word as it enters said second incrementing means.
Claim 11
Dependent Claim
187 words
Digitalized tone generating means in accordance with claim 7 comprising: data storage means for receiving and storing said input data bits at a rate of S bits per second until T bits have been received, where T is the number of bits to be encoded on the tones being generated; gating means responsive to the storing of T bits in said data storage means and further responsive to the output signal of said clock pulse source means to read and analyze the T data bits stored in said data storage means and to generate a series of second binary words, one for each tone being generated, at a rate equal to the multiplexing rate of said phase words circulating in said closed loop circuit means; successive ones of said second binary words being bit synchronized with predetermined successive ones of said circulating phase words; said second adding means constructed to add each of said series of second binary words to the time corresponding circulating phase word to produce a phase shift in each phase word in accordance with the value of the second binary word added thereto.
Claim 12
Dependent Claim
185 words
Digitalized tone generating means comprising: closed loop circuit means for circulating a stream of tone representing data bits in serial manner therearound and comprising: delay line means constructed to shift data bits therealong in response to clock pulses supplied thereto; and first increment generating means connected in series with said delay line means; clock pulse source means having its output signal supplied to said delay line means to shift data bits therethrough at a predetermined rate f0; said first increment generating means constructed to generate and to add a binary increment K1 to said stream of data bits each Nth circulation thereof in said closed loop circuit means; and output storage means constructed to receive said stream of data bits each Rth circulation thereof in said closed loop circuit means; converting means responsive to each occurrence of reception of said stream of data bits in said output storage means to generate a series of signals each having a magnitude A determined by the binary value X of the stream of data bits from which it was derived and in accordance with the expression A f(X).
Claim 13
Dependent Claim
185 words
Digitalized tone generating means comprising: closed loop circuit means for circulating a stream of tone representing data bits in serial manner therearound and comprising: delay line means constructed to shift data bits therealong in response to clock pulses supplied thereto; and first increment generating means connected in series with said delay line means; clock pulse source means having its output signal supplied to said delay line means to shift data bits therethrough at a predetermined rate f0; said first increment generating means constructed to generate and to add a binary increment K1 to said stream of data bits each Nth circulation thereof in said closed loop circuit means; and output storage means constructed to receive said stream of data bits each Rth circulation thereof in said closed loop circuit means; converting means responsive to each occurrence of reception of said stream of data bits in said output storage means to generate a series of signals each having a magnitude A determined by the binary value X of the stream of data bits from which it was derived and in accordance with the expression A f(X).
Claim 14
Dependent Claim
104 words
Digitalized tone generating means in accordance with claim 11 comprising: counting means responsive to the output pulses from said clock pulse source to produce a first output signal which counts and identifies the time slot of each bit of said stream of data bits as said each bit enters said first increment generating means; and in which said first increment generating means is responsive to said first output signal off said counting means to add each bit of said binary increment K1 to a bit of corresponding order of magnitude of said stream of data bits as said bits enter said first incrementing means.
Claim 15
Dependent Claim
116 words
Digitalized tone generating means in accordance with claim 11 and comprising: second incrementing means connected in series with said delay line means and said first incrementing means in said closed loop circuit means; a source of input data; said second incrementing means responsive to the data from said source of input data to generate a second binary increment K2 having a value that is varied and determined in accordance with the nature of said input data, and to add said second binary increment K2 to said circulatIng stream of data bits at predetermined tine intervals to advance the phase of the tone represented thereby by an amount determined by the value of said binary increment K2.
Claim 16
Dependent Claim
107 words
Digitalized tone generating means in accordance with claim 13 comprising: counting means responsive to the output pulses from said clock pulse source to produce a first output signal which counts and identifies the time slot of each of said bits of said stream of data bits as said each bit enters said first increment generating means; and in which said first increment generating means is responsive to said first output signal of said counting means to add each bit of said binary increment K1 to each bit of a corresponding order of magnitude of said stream of data bits as they enter said first increment generating means.
Claim 17
Dependent Claim
105 words
Digitalized tone generating means in accordance with claim 14 in which: said counting means is further responsive to the output pulses from said clock pulses to produce a second output signal which counts and identifies each bit of said stream of data bits as each of said bits enter said second increment generating means; and in which said second increment generating means is responsive to said second output signal of said counting means to add each bit of said binary increment K2 to the bit of corresponding order of magnitude of said stream of data bits as said bits enter said second increment generating means.
Claim 18
Dependent Claim
81 words
Digitalized tone generating means in accordance with claim 11 in which said delay line means has a capacity to hold at least two of said phase words and comprising: counting means responsive to the output pulses from said clock pulse source means to identify each of said phase words as it circulates within said closed loop circuit means and to identify the time slot occupied by each bit of each word as said bits circulate in said closed loop circuit means.
Claim 19
Dependent Claim
67 words
Digitalized tone generating means in accordance with claim 16 in which said first increment generating means is constructed to respond to a first output signal of said counting means to add a unique and different binary increment K1 to each of said two or more phase words as said two or more phase words circulate through said closed loop circuit means and through said first incrementing means.
Claim 20
Dependent Claim
129 words
Digitalized tone generating means in accordance with claim 17 and comprising: second incrementing means connected in series with said delay line means and said first incrementing means in said closed loop circuit means; a source of input data; said second incrementing means responsive to the incoming data from said source of input data to generate for each of said two or more binary words, at predetermined periodic intervals, a second binary increment K2 having a value that is determined in accordance with the nature of said input data, and to add said second binary increment K2 to the time corresponding circulating binary word to advance the phase of the tone represented by said time corresponding binary word by an amount determined by the value of said binary increment K2.
Claim 21
Dependent Claim
102 words
Digitalized tone generating means in accordance with claim 18 in which: said counting means is further responsive to the output pulses from said clock pulses to produce a second output signal which counts and identifies each of the bits of said binary words as said bits enter said second increment generating means; and in which said second increment generating means is responsive to said second output signal of said counting means to add each bit of said binary increment K2 to the bit of corresponding order of magnitude of said time corresponding binary word as it enters said second increment generating means.
Claim 22
Dependent Claim
187 words
Digitalized tone generating means in accordance with claim 17 comprising: data storage means for receiving and storing said input data bits at a rate of S bits per second until T bits have been rEceived, where T is the number of bits that can be encoded on the tones being generated; gating means responsive to the storing of T bits in said data storage means and further responsive to the output signal of said clock means to read and analyze the T data bits stored in said data storage means and to generate a series of second binary words, one for each tone being generated, at a rate equal to the circulation rate of said binary words circulating in said closed loop circuit means; successive ones of said second binary words being bit synchronized with predetermined successive ones of said circulating binary words; said second adding means constructed to add each of said series of second binary words to the time corresponding circulating binary word to produce a phase shift in each circulating binary word in accordance with the value of the second binary word added thereto.
Claim 23
Dependent Claim
182 words
Digitalized tone generating means comprising: a closed loop circuit means for circulating therearound at least one phase word comprised of a serial stream of M data bits and comprising: delay line means constructed to shift data bits therealong in response to clock pulses supplied thereto; and first adding means connected in series with said delay line means; clock pulse source means having its output signal supplied to said delay line means to shift data bits therethrough at a predetermined rate f0; first increment generating means constructed to generate and to supply a binary increment K1 to said first adding means each Nth circulation of said phase word in said closed loop circuit means; said first adding means constructed to add together said phase word and said binary increment K1; output storage means constructed to receive each phase word each Rth circulation thereof in said closed loop circuit means; converting means responsive to said phase words in said output storage means to generate a signal representative of the amplitude of said tone being generated corresponding to the phase magnitude of said phase word.
Claim 24
Dependent Claim
182 words
Digitalized tone generating means comprising: a closed loop circuit means for circulating therearound at least one phase word comprised of a serial stream of M data bits and comprising: delay line means constructed to shift data bits therealong in response to clock pulses supplied thereto; and first adding means connected in series with said delay line means; clock pulse source means having its output signal supplied to said delay line means to shift data bits therethrough at a predetermined rate f0; first increment generating means constructed to generate and to supply a binary increment K1 to said first adding means each Nth circulation of said phase word in said closed loop circuit means; said first adding means constructed to add together said phase word and said binary increment K1; output storage means constructed to receive each phase word each Rth circulation thereof in said closed loop circuit means; converting means responsive to said phase words in said output storage means to generate a signal representative of the amplitude of said tone being generated corresponding to the phase magnitude of said phase word.
Claim 25
Dependent Claim
113 words
Digitalized tone generating means in accordance with claim 21 comprising: counting means responsive to the output pulses from said clock pulse source to produce a first output signal which counts and identifies the time slot of each of said M bits of said phase word as said each bit enters said first adding means; and in which said first increment generating means is responsive to said first output signal of said counting means to supply each bit of said binary increment K1 to said first adding means at a time which is coincident with the entering into said first adding means of each bit of corresponding order of magnitude of said phase word.
Claim 26
Dependent Claim
161 words
Digitalized tone generating means in accordance with claim 21 and comprising means for phase shifting the tone being generated to encode thereon data from a data input source: said phase shifting means comprising: second adding means connected in series with said delay line means and said first adding means in said closed loop circuit means; means responsive to successive increments of data from said source of input data to generate, at a predetermined periodic rate, a second binary increment K2 having a value that is predetermined in accordance with the nature of each successive increment of data; means for supplying said second binary increment K2 to said second adding means at said predetermined periodic rate and at specific times coincident with the passing of said phase word through said second adding means; said second adding means constructed to add together said phrase word and said second binary increment K2 to advance the phase of the tone represented by said phase word.
Claim 27
Dependent Claim
113 words
Digitalized tone generating means in accordance with claim 23 comprising: counting means responsive to the output pulses from said clock pulse source to produce a first output signal which counts and identifies the time slot of each of said M bits of said phase word as said each bit enters said first adding means; and in which said first increment generating means is responsive to said first output signal of said counting means to supply each bit of said binary increment K1 to said first adding means at a time which is coincident with the entering into said first adding means of each bit of corresponding order of magnitude of said phase word.
Claim 28
Dependent Claim
111 words
Digitalized tone generating means in accordance with claim 24 in which: said counting means is further responsive to the output pulses from said clock pulse source to produce a second output signal which counts and identifies each of the M bits of said phase word as it enters said second adding means; and in which said second increment generating means is responsive to said second output signal of said counting means to supply each bit of said binary increment K2 to said second adding means at a time which is coincident with the entering of each bit of corresponding order of magnitude of said phase word into said second adder means.
Claim 29
Dependent Claim
81 words
Digitalized tone generating means in accordance with claim 21 in which said delay line means has a capacity to hold at least two of said phase words and comprising: counting means responsive to the output pulses from said clock pulse source means to identify each of said phase words as it circulates within said closed loop circuit means and to identify the time slot occupied by each bit of each word as said bits circulate in said closed loop circuit means.
Claim 30
Dependent Claim
110 words
Digitalized tone generating means in accordance with claim 26 in which: said first increment generating means is constructed to respond to said first output signal of said counting means to supply a unique one of said binary increments K1 to said first adding means each Nth circulation of said two or more phase words through said closed loop circuit means; and in which said first adding means is constructed to add said binary increments K1 to said phase words to produce a sequence of binary words for each of said two or more phase words, which sequences of binary words represent successively occurring phase angles of the tones being generated.
Claim 31
Dependent Claim
142 words
Digitalized tone generating means in accordance with claim 27 and comprising means for phase shifting the tones being generated to encode thereon data from a data input source, and comprising: second increment means connected in series with said delay line means and said first increment generating means in said closed loop circuit means said second incrementing means responsive to the data from said source of input data to generate for each of said two or more phase words, at predetermined periodic intervals, a time coincident second binary increment K2 having a value that is determined in accordance with the nature of said input data, and to add each of said second binary increments K2 to the time coincident circulating phase word to advance the phase of the tone represented by said phase word which is comprised of said sequence of binary words.
Claim 32
Dependent Claim
113 words
Digitalized tone generating means in accordance with claim 28 in which: said counting means is further responsive to the output pulses from said clock pulse source to produce a second output signal which counts and identifies each of the M bits of each phase word as it enters said second adding means; and in which said second increment generating means is responsive to said second output signal of said counting means to supply each bit of said binary increment K2 to said second adding means at a time which is coincident with the entering into said second adder means of each bit of corresponding order of magnitude of the time corresponding phase word.
Claim 33
Dependent Claim
188 words
Digitalized tone generating means in accordance with claim 27 comprising: data storage means for receiving and storing sAid input data bits at a rate of S bits per second until T bits have been received, where T is the number of bits that can be encoded on the tones being generated; gating means responsive to the storing of T bits in said data storage means and further responsive to the output signal of said clock pulse source means to read and analyze the T data bits stored in said data storage means and to generate a series of second binary words, one for reach tone being generated, at a rate equal to the multiplexing rate of said phase words circulating in said closed loop circuit means; successive ones of said second binary words being bit synchronized with predetermined successive ones of said circulating phase words; said second adding means constructed to add each of said series of second binary words to he time corresponding circulating phase word to produce a phase shift in each phase word in accordance with the value of the second binary word added thereto.
Claim 34
Dependent Claim
237 words
Digitalized tone generating means comprising: closed loop circuit means for circulating therearound, at a circulating rate fs, at least one periodically changing phase word comprised of a serial stream of M data bits, where M is an integer, and comprising: delay line means constructed to shift said data bits therealong in response to clock pulses supplied thereto at a rate f0; and first adding means connected in series with said delay line means; clock pulse source means having an output signal supplied to said delay line means to shift data bits therethrough at said f0 rate; first increment generating means constructed to generate a binary increment K1 and to supply said binary increment K1 to said first adding means at a time which is coincident with each Nth circulation of said phase word through said first adding means to produce a sequence of binary words which form said periodically changing phase word in said closed loop circuit means, each binary word having a value representing a specific phase angle of the tone being generated; output means constructed to receive each binary word each Rth circulation thereof in said closed loop circuit means, where R is an integer; and converting means responsive to each of said binary words received in said output means to generate a signal representative of that amplitude of the tone being generated which corresponds to the phase angle represented by said each binary word.
Claim 35
Dependent Claim
237 words
Digitalized tone generating means comprising: closed loop circuit means for circulating therearound, at a circulating rate fs, at least one periodically changing phase word comprised of a serial stream of M data bits, where M is an integer, and comprising: delay line means constructed to shift said data bits therealong in response to clock pulses supplied thereto at a rate f0; and first adding means connected in series with said delay line means; clock pulse source means having an output signal supplied to said delay line means to shift data bits therethrough at said f0 rate; first increment generating means constructed to generate a binary increment K1 and to supply said binary increment K1 to said first adding means at a time which is coincident with each Nth circulation of said phase word through said first adding means to produce a sequence of binary words which form said periodically changing phase word in said closed loop circuit means, each binary word having a value representing a specific phase angle of the tone being generated; output means constructed to receive each binary word each Rth circulation thereof in said closed loop circuit means, where R is an integer; and converting means responsive to each of said binary words received in said output means to generate a signal representative of that amplitude of the tone being generated which corresponds to the phase angle represented by said each binary word.
Claim 36
Dependent Claim
114 words
Digitalized tone generating means in accordance with claim 31 comprising: counting means responsive to the output pulses from said clock pulse source means to produce a first output signal which counts and identifies the time slot of each of said M bits of said phase word as said each bit enters said first adding means; and in which said first increment generating means is responsive to said first output signal of said counting means to supply each bit of said binary increment K1 to said first adding means at a time which is coincident with the entering into said first adding means of each bit of corresponding order of magnitude of said phase word.
Claim 37
Dependent Claim
181 words
Digitalized tone generating means in accordance with claim 31 and comprising means for phase shifting the tone being generated to encode thereon data from a data input source; and comprising: said phase shifting means comprising: second adding means connected in series with said delay line means and said first adding means in said closed loop circuit means; second increment generating means responsive to successive increments of data from said source of input data to generate, at a predetermined periodic rate, a second binary increment K2 having a value that is predetermined periodic rate, a second binary increment K2 having a value that is predetermined in accordance with the nature of each successive increment of data; means for supplying said second binary increment K2 to said second adding means at said predetermined periodic rate and at specific times coincident with the passing of said binary phase word through said second adding means; said second adding means constructed to add together said binary phase word and said second binary increment K2 to advance the phase of the tone represented by said phase word.
Claim 38
Dependent Claim
114 words
Digitalized tone generating means in accordance with claim 33 comprising: counting means responsive to the output pulses from said clock pulse source means to produce a first output signal which counts and identifies the time slot of each of said M bits of said phase word as said each bit enters said first adding means; and in which said first increment generating means is responsive to said first output signal of said counting means to supply each bit of said binary increment K1 to said first adding means at a time which is coincident with the entering into said first adding means of each bit of corresponding order of magnitude of said phase word.
Claim 39
Dependent Claim
113 words
Digitalized tone generating means in accordance with claim 34 in which: said counting means is further responsive to the output pulses from said clock pulse source means to produce a second output signal which counts and identifies each of the M bits of said phase word as it enters said second adding means; and in which said second increment generating means is responsive to said second output signal of said counting means to supply each bit of said second binary increment K2 to said second adding means at a time which is coincident with the entering of each bit of corresponding order of magnitude of said phase word into said second adder means.
Claim 40
Dependent Claim
81 words
Digitalized tone generating means in accordance with claim 31 in which said delay line means has a capacity to hold at least two of said phase words and comprising: counting means responsive to the output pulses from said clock pulse source means to identify each of said phase words as it circulates within said closed loop circuit means and to identify the time slot occupied by each bit of each word as said bits circulate in said closed loop circuit means.
Claim 41
Dependent Claim
109 words
Digitalized tone generating means in accordance with claim 36 in which: said first increment generating means is constructed to respond to said first output signal of said counting means to supply a unique one of said binary increments K1 to said first adder means each Nth circulation of said two or more phase words through said closed loop circuit means; and in which said first adder means constructed to add said binary increments K1 to said phase words to produce a sequence of binary words for each of said two or more phase words which sequences of binary words represent successively occurring phase angles of the tones being generated.
Claim 42
Dependent Claim
137 words
Digitalized tone generating means in accordance with claim 37 and comprising means for phase shifting the tone generated to encode thereon data from a data input source; said phase shifting means comprising: second incrementing means connected in series with said delay line means and said first incrementing means in said closed loop circuit means; said second incrementing means responsive to the data from said source of input data to generate for each of said two or more phase words, at predetermined periodic intervals, a second binary increment K2 having a value that is determined in accordance with the nature of said input data, and to add said second binary increments K2 to said circulating phase words to advance the phase of the tone represented by said phase word, which is comprised of said sequence of binary words.
Claim 43
Dependent Claim
115 words
Digitalized tone generating means in accordance with claim 38 in which: said counting means is further responsive to the output pulses from said clock pulse source means to produce a second output signal which counts and identifies each of the M bits of each phAse word as it enters said second adding means; and in which said second increment generating means is responsive to said second output signal of said counting mean s to supply each bit of said binary increment K2 to said second adding means at a time which is coincident with the entering into said second adder means of each bit of corresponding order of magnitude of the time corresponding phase word.
Claim 44
Dependent Claim
186 words
Digitalized tone generating means in accordance with claim 37 comprising: data storage means for receiving and storing said input data bits at a rate of S bits per second until T bits have been received, where T is the number of bits that can be encoded on the tones being generated; gating means responsive to the storing of T bits in said data storage means and further responsive to the output signal of said clock means to read and analyze the T data bits stored in said data storage means and to generate a series of second binary words, one for each tone being generated, at a rate equal to the multiplexing rate of said phase words circulating in said closed loop circuit means; successive ones of said second binary words being bit synchronized with predetermined successive ones of said circulating phase words; said second adding means constructed to add each of said series of second binary words to the time corresponding circulating phase word to produce a phase shift in each phase word in accordance with the value of the second binary word added thereto.
Claim 45
Dependent Claim
144 words
Digitally implemented signal waveform generating means comprising, in combination: binary number circulating means including incrementing means for incrementing a circulating binary word in said circulating means once each complete cycle thereof, the increment being a positive integral number; phase to amplitude converting means connected to said binary word circulating means for receiving the circulating stored word once each complete circulation thereof and providing as an output a signal pulse having an energy content proportional to the numerical value of said circulating word; the circulating word in said binary word circulating means having a continuously repeating numerical sequence which may be considered representative of phase positions of an electrical signal; and filter means connected to the output of said phase to amplitude converting means for converting said variable energy pulses to an analog signal representative in frequency of the incremental change of said binary words.
Claim 46
Dependent Claim
144 words
Digitally implemented signal waveform generating means comprising, in combination: binary number circulating means including incrementing means for incrementing a circulating binary word in said circulating means once each complete cycle thereof, the increment being a positive integral number; phase to amplitude converting means connected to said binary word circulating means for receiving the circulating stored word once each complete circulation thereof and providing as an output a signal pulse having an energy content proportional to the numerical value of said circulating word; the circulating word in said binary word circulating means having a continuously repeating numerical sequence which may be considered representative of phase positions of an electrical signal; and filter means connected to the output of said phase to amplitude converting means for converting said variable energy pulses to an analog signal representative in frequency of the incremental change of said binary words.
Claim 47
Dependent Claim
69 words
Apparatus as claimed in claim 41 wherein said circulating means further includes further incrementing means for periodically and abruptly change the numerical value of said binary word wherein the periodicity of said second incremental change is less than the periodicity of a full cycle of said binary word, the output signal from said apparatus changing phase of the resulting analog signal as a result of said second incremental change.
Claim 48
Dependent Claim
70 words
Apparatus as claimed in claim 41 wherein said phase to amplitude converting means includes means for changing the binary word output from said circulating means to a binary word indicative of amplitude of a sine wave at a phase represented by said circulating binary word; and said phase to amplitude converting means also includes digital to analog converting means for providing the variable pulse energy output to said filter means.
Claim 49
Independent Claim
94 words
The method of providing a signal waveform output comprising the steps of: continuously incrementing a numerical sequence of numbers in a predetermined order wherein said numerical sequence represents phase of the output signal waveform being produced; converting said incremental numerical number to a binary number indicative of amplitude at the phase represented by said numerical number; converting said digital number representing amplitude to a pulse whose energy content is representative of said digital number; and filtering said variable pulse energy signal to provide aN output waveform indicative of the pulse energy content and polarity.
Claim 50
Independent Claim
94 words
The method of providing a signal waveform output comprising the steps of: continuously incrementing a numerical sequence of numbers in a predetermined order wherein said numerical sequence represents phase of the output signal waveform being produced; converting said incremental numerical number to a binary number indicative of amplitude at the phase represented by said numerical number; converting said digital number representing amplitude to a pulse whose energy content is representative of said digital number; and filtering said variable pulse energy signal to provide aN output waveform indicative of the pulse energy content and polarity.