Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
257 words
A circuit for generating a message code comprised of a series of set and clear states made up of a series of distinct subseries of set and clear states comprising a register including a series of bistable stages capable of storing Set and clear states, said stages being connected for serial transfer, first input means to inject a subseries in said register, translating means responsive to the output of said drive means operable to on and off conditions with said on condition effecting a repeated drive to said stages to transfer the states stored therein, first control means responsive to each operation of said first input means to actuate said drive means to the on condition and second control means to actuate said drive means to the off condition, second input means connected to a first subseries of stages in the first portion of said register, third input means connected to a stage adjacent to the first portion of said register, the said third input means operating to inject a tag bit in said register prior to the input of a message code, first output means connected to the first stage of each successive subseries of stages after the second and energized by the input of a set state, said first output means being connected to operate said second control means whereby following each input of a subseries the said register is caused to be driven to advance the subseries until said tag bit energizes the nest output means whereupon transfer is halted until the next input.
Claim 2
Dependent Claim
257 words
A circuit for generating a message code comprised of a series of set and clear states made up of a series of distinct subseries of set and clear states comprising a register including a series of bistable stages capable of storing Set and clear states, said stages being connected for serial transfer, first input means to inject a subseries in said register, translating means responsive to the output of said drive means operable to on and off conditions with said on condition effecting a repeated drive to said stages to transfer the states stored therein, first control means responsive to each operation of said first input means to actuate said drive means to the on condition and second control means to actuate said drive means to the off condition, second input means connected to a first subseries of stages in the first portion of said register, third input means connected to a stage adjacent to the first portion of said register, the said third input means operating to inject a tag bit in said register prior to the input of a message code, first output means connected to the first stage of each successive subseries of stages after the second and energized by the input of a set state, said first output means being connected to operate said second control means whereby following each input of a subseries the said register is caused to be driven to advance the subseries until said tag bit energizes the nest output means whereupon transfer is halted until the next input.
Claim 3
Dependent Claim
32 words
The encoder of claim 1 including means to input into said register a tag character leading the first message character and a stop character following the last character defining the calling code.
Claim 4
Dependent Claim
22 words
The encoder of claim 1 wherein said input means is operable to input an even number of set states for each character.
Claim 5
Dependent Claim
45 words
The encoder of claim 3 wherein the said input means is operable to set an even number of set states for each character and the means to input the tag and stop characters is connected to set stages defining such characters in an identical sense.
Claim 6
Dependent Claim
283 words
A decoder for use with a selective signalling system including a voltage source adapted to be connected to drive first and second pulse generators in response to an on-off voltage waveform representing a calling code, a plurality of bistable stages connected in series to be driven by said generators with each stage being capable of being driven to a set or clear condition, the said stages being connected to said generators in a pattern to provide a serial comparison of pulses produced by said generators to effect an advance of a set condition along said stages for one pattern and block the advance of a set condition for all other patterns whereby to provide a detect output signal for a proper calling code and no output signal for improper codes, means for clearing out said stages prior to the receipt of a message and means for setting the first stage at the receipt of a calling code, means responsive to said waveform to connect said source to drive one generator each time the voltage waveform goes on and to drive the other generator each time the voltage waveform goes off whereby to energize one or the other of said generators to provide pulse inputs to said stages in a given pattern, wherein there is included means responsive to the absence of a voltage level input to said decoder to drive the generator associated with the absence of a voltage level continuously between calling codes, wherein the said means for clearing out said stages includes means operable a given period of time after said voltage level has been absent to effect the clearing of said stages prior to the receipt of a calling code.
Claim 7
Dependent Claim
283 words
A decoder for use with a selective signalling system including a voltage source adapted to be connected to drive first and second pulse generators in response to an on-off voltage waveform representing a calling code, a plurality of bistable stages connected in series to be driven by said generators with each stage being capable of being driven to a set or clear condition, the said stages being connected to said generators in a pattern to provide a serial comparison of pulses produced by said generators to effect an advance of a set condition along said stages for one pattern and block the advance of a set condition for all other patterns whereby to provide a detect output signal for a proper calling code and no output signal for improper codes, means for clearing out said stages prior to the receipt of a message and means for setting the first stage at the receipt of a calling code, means responsive to said waveform to connect said source to drive one generator each time the voltage waveform goes on and to drive the other generator each time the voltage waveform goes off whereby to energize one or the other of said generators to provide pulse inputs to said stages in a given pattern, wherein there is included means responsive to the absence of a voltage level input to said decoder to drive the generator associated with the absence of a voltage level continuously between calling codes, wherein the said means for clearing out said stages includes means operable a given period of time after said voltage level has been absent to effect the clearing of said stages prior to the receipt of a calling code.
Claim 8
Dependent Claim
48 words
The decoder of claim 5 wherein each said stage includes an input winding to drive said stage to a clear condition and the said pattern connection to said generators is made by a series of connectors linking certain of said stages of said generators to accomplish said pattern.
Claim 9
Dependent Claim
37 words
The decoder of claim 5 wherein there is included a separate connector means for connecting said stages to said generator in said pattern to provide said serial comparison of the pattern of pulses provided by said generators.
Claim 10
Dependent Claim
39 words
The decoder of claim 5 wherein there is included aS part of such source a filter responsive to the presence of a tone input thereto and said on-off waveform is comprised of the presence of absence of said tone.
Claim 11
Dependent Claim
44 words
The decoder of claim 5 wherein there is included as a part of said source first and second filters each responsive to first and second tones and said on-off voltage waveform is comprised of the first and second tones representing on and off conditions.
Claim 12
Dependent Claim
235 words
In a selective signalling system the combination comprising an encoder for providing a calling code and a plurality of decoders, one for each calling code, the encoder including means to register a series of numbers as a given calling code and means responsive to registration of a complete calling code to translate said numbers into a waveform of given time duration comprised of a series of on or off voltage conditions, each decoder generator means responsive to said waveform to translate said condition into a series of on-off pulses, a register of bistable state stages coupled for serial transfer, means in each decoder responsive to said pulses to apply an advance drive to said stages to advance a given state therealong, and means in each register to effect a comparison of each pulse of said sequence with the sequence assigned to said decoder to permit the advance of a given state therealong to produce an output signal if said sequence is correct whereby each decoder or said system responds to said waveform but only one decoder further produces an output signal, wherein there is included means responsive to the absence of a voltage level input to said decoder to drive the generator associated with the absence of a voltage level continuously between calling codes, wherein the decoder includes means for clearing out said register a given period after the cessation of an on voltage condition.
Claim 13
Dependent Claim
235 words
In a selective signalling system the combination comprising an encoder for providing a calling code and a plurality of decoders, one for each calling code, the encoder including means to register a series of numbers as a given calling code and means responsive to registration of a complete calling code to translate said numbers into a waveform of given time duration comprised of a series of on or off voltage conditions, each decoder generator means responsive to said waveform to translate said condition into a series of on-off pulses, a register of bistable state stages coupled for serial transfer, means in each decoder responsive to said pulses to apply an advance drive to said stages to advance a given state therealong, and means in each register to effect a comparison of each pulse of said sequence with the sequence assigned to said decoder to permit the advance of a given state therealong to produce an output signal if said sequence is correct whereby each decoder or said system responds to said waveform but only one decoder further produces an output signal, wherein there is included means responsive to the absence of a voltage level input to said decoder to drive the generator associated with the absence of a voltage level continuously between calling codes, wherein the decoder includes means for clearing out said register a given period after the cessation of an on voltage condition.
Claim 14
Dependent Claim
33 words
The system of claim 10 wherein each decoder includes a plurality of connectors whereby to permit a change in the sequence of compared pulses to effectively change the code assigned to said decoder.