Semiconductor integrated circuit with reduced minority carrier storage effect

Claim 2

A semiconductor integrated circuit comprising: a first conductivity-type semiconductor substrate having one principal surface in which first and second regions of a second conductivity type extend covered with an epitaxially grown semiconductor layer of the first conductivity type having a relatively low impurity concentration; third and fourth, diffused regions of the second conductivity type formed in a closed shape and extending from the surface of said semiconductor layer to said first and second regions so as to surround and electrically isolate first and second portions of said semiconductor layer positioned on said first and second regions respectively; a fifth, diffused region of the first conductivity type formed in the surface of said first portion of said semiconductor layer and having a relatively high surface impurity concentration; sixth and seventh, diffused regions of the second conductivity type in the surfaces of said fifth region and the second portion of said semiconductor layer, respectively, having substantially the same depth and surface impurity concentration, the depth of said sixth region being defined as being less than that of said fifth region and the distance from said sixth region to said first region being less than the diffusion length of the minority carrier in the first conductivity-type region; first, second and third electrodes formed respectively on the surfaces of said third, fifth and sixth regions; and fourth and fifth electrodes formed respectively on the surfaces of said fourth region and said second portion of said semiconductor layer.

Claim 3

A semiconductor integrated circuit according to claim 3, wherein said second portion of the semiconductor layer contains an eighth, diffused region of the first conductivity type having said seventh region therein, the surface of said eighth region being fitted with a sixth electrode connected to said fourth and fifth electrodes, and said seventh region being fitted with a seventh electrode.

Claim 4

A semiconductor integrated circuit according to claim 3, wherein said second and third electrodes are short circuited.

Claim 5

A semiconductor integrated circuit according to claim 3, wherein said first and second conductivity types are N and P types respectively; said substrate and semiconductor layer are both made of silicon; and said first to fourth, sixth and seventh regions of second conductivity type have a surface impurity concentration of about 5 X 1019 to 2 X 1021 atoms/cm.3.

Claim 6

A sEmiconductor integrated circuit consisting of at least one transistor portion and at least two diode portions comprising: a first conductivity-type semiconductor substrate having one principal surface in which first, second and third regions of a second conductivity type extend covered with an epitaxially grown semiconductor layer of the first conductivity type having a relatively low impurity concentration; fourth, fifth and sixth, diffused regions of the second conductivity type like formed in a closed shape and extending from the surface of said semiconductor layer to said first to third regions so as to surround and electrically isolate first, second and third portions of said semiconductor layer positioned on said first to third regions, respectively; seventh and eighth, diffused regions of the first conductivity type having a relatively high impurity concentration formed in the surfaces of said first and second portions of the semiconductor layer having substantially the same depth and surface impurity concentration, respectively; ninth, tenth and eleventh, diffused regions of the second conductivity type formed in the surfaces of said seventh and eighth regions and said third portion of the semiconductor layer to have substantially the same depth and surface impurity concentration, respectively; first and second electrodes fitted to the surfaces of said ninth and tenth regions; a third electrode fitted to the surface of said seventh region; a fourth electrode fitted to the surface of said fourth region surrounding the first portion of said semiconductor layer; a fifth electrode short circuiting said fifth region surrounding said second portion of said semiconductor layer with said eighth region; and sixth and seventh electrodes fitted to said third portion of the semiconductor layer and said sixth region, respectively; said first, third and fourth electrodes and the semiconductor regions connected therewith constituting a transistor; said second and fifth electrodes and the semiconductor regions connected therewith constituting a first diode portion; and said sixth and seventh electrodes and the semiconductor portions connected therewith constituting a second diode portion.

Claim 7

A semiconductor integrated circuit according to claim 7, comprising a resistor portion including a twelfth region of the second conductivity type extending in said principal surface of said substrate, a thirteenth, diffused region of the second conductivity type formed in a closed ring shape and extending from the surface of said semiconductor layer to said twelfth region thereunder so as to surround and electrically isolate a fourth portion of said semiconductor layer positioned on said twelfth region, and eighth and ninth electrodes fitted to two different portions of the surface of said fourth portion of the semiconductor layer.

Claim 8

A semiconductor integrated circuit according to claim 7, wherein said first to sixth and ninth to eleventh regions have a surface impurity concentration of about 5 X 1019 to 2 X 1021 atoms/cm.3; said first and second conductivity types are P and N type respectively; and said semiconductor substrate and said epitaxially grown semiconductor layer are made of silicon.

Claim 9

A semiconductor integrated circuit comprising a first conductivity-type semiconductor substrate having one principal surface; a plurality of first regions of a second conductivity type formed in said one principal surface of the substrate and having an impurity concentration not less than 5 X 1019 atoms/cm.3; a semiconductor layer of the first conductivity type having a uniform and relatively low impurity concentration and formed on the one principal surface of the substrate to cover said plurality of first regions; a plurality of second, diffused regions of the second conductivity type each formed in a closed shape and extending from the surface of said semiconDuctor layer to the corresponding one of the first regions so as to surround and electrically isolate a portion of said semiconductor layer positioned on the corresponding one of the first regions; and a plurality of third, diffused regions of the second conductivity type formed in the isolated portions of said semiconductor layer, respectively, the distance between each first region and the corresponding third region being less than the diffusion length of the minority carrier in the first conductivity-type semiconductor material.