US3596109A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Peak detection circuit
Assignee: Philips North America LLC
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Filing: 1969-02-19
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Granted: 1971-07-27
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Expires: 1989-02-19
Abstract
Abstract A peak detector circuit having an output proportional to the most recently assumed peak value of an amplitude varying input signal is disclosed. In the described embodiment the circuit includes an input stage, a diode-storage capacitor series combination, a variable impedance path across the capacitor, and an output stage. The impedance of the variable impedance path is controlled by the form of the input signal and is such that when no input signal is applied it has a relatively high value but when an input pulse is applied it has a relatively low value for at least part of the duration of that pulse.
Inventors
- 👤 Harry Lee Marshall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:17
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/04
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
172 words
A circuit having an output signal which is related to the maximum value of the most recent peak of an amplitude varying input signal appearing across input terminals comprising: first transistor means having an input electrode coupled to one of said input terminals, a first output electrode coupled to one terminal of a power supply, and a second output electrode coupled through a resistance means to a second terminal of said power supply; detection means including a series combination of a diode and a capacitor coupled in parallel with said resistance means; differentiating means coupled to said one of said input terminals; second transistor means having an input electrode coupled to said one of said input terminals through said differentiating means, a first output electrode coupled to said second terminal of said power supply, and a second output electrode coupled to the junction of said diode and said capacitor; and output amplifier means having an input directly coupled to the junction of said diode and said capacitor and deliveriNg said output signal.
Claim 2
Dependent Claim
172 words
A circuit having an output signal which is related to the maximum value of the most recent peak of an amplitude varying input signal appearing across input terminals comprising: first transistor means having an input electrode coupled to one of said input terminals, a first output electrode coupled to one terminal of a power supply, and a second output electrode coupled through a resistance means to a second terminal of said power supply; detection means including a series combination of a diode and a capacitor coupled in parallel with said resistance means; differentiating means coupled to said one of said input terminals; second transistor means having an input electrode coupled to said one of said input terminals through said differentiating means, a first output electrode coupled to said second terminal of said power supply, and a second output electrode coupled to the junction of said diode and said capacitor; and output amplifier means having an input directly coupled to the junction of said diode and said capacitor and deliveriNg said output signal.
Claim 3
Dependent Claim
67 words
The circuit of claim 1 wherein the input electrode, the first output electrode, and the second output electrode of said first transistor means are a base, collector, and emitter electrode, respectively, of said first transistor means and the input electrode, the first output electrode, and the second output electrode of said second transistor means are the base, emitter, and collector electrode, respectively, of said second transistor means.
Claim 4
Dependent Claim
70 words
The circuit of claim 2 wherein said output amplifier means comprises a field effect transistor having a gate element coupled to the junction of said diode and said capacitor, a drain element coupled to said one terminal of said power supply, and a source element coupled through a second resistance means to said second terminal of said power supply, and said output signal is taken across said second resistance means.
Claim 5
Dependent Claim
54 words
The circuit of claim 2 wherein said output amplifier means comprises third and fourth transistor means connected in the Darlington configuration with the base of said third transistor means coupled to the junction of said diode and said capacitor and said output signal is taken from the emitter circuit of said fourth transistor means.
Claim 6
Dependent Claim
15 words
The circuit of claim 1 wherein said output amplifier means comprises a filed effect transistor.
Claim 7
Dependent Claim
20 words
The circuit of claim 1 wherein said output amplifier means comprises a pair of transistors connected in the Darlington connection.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-07-26 | 1975-01-25 | 1975-07-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-07-26 | 1979-01-25 | 1979-07-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-07-26 | 1983-01-25 | 1983-07-27 | $7700.00 | Window Closed / Lapsed |