US3594736A
Expired / Lapsed
US
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Mos read-write system
Assignee: Motorola Solutions Inc
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Filing: 1968-11-29
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Granted: 1971-07-20
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Expires: 1988-11-29
Abstract
Abstract Disclosed is a MOS read-write system for reading the binary content of a MOS storage cell and for writing into the storage cell. The system includes cross-coupled MOS devices which are connected to bit lines leading into the MOS storage cell, and these MOS devices or drivers are connected in push-pull and are conductively controlled by data and read and write command signals. The MOS devices are connected to write inverters for receiving a write command signal and to data inverters for receiving data input signals. A MOS read gate is connected between the MOS devices and a read command input terminal and is further connected to an input-output data line. The bit lines are isolated from the input-output data line by the read gate, by the MOS switching devices and by a pair of bit line terminating devices. The storage cell is connected across the pair of bit lines and is interrogated and written into by applying data signals and read and write command signals to the system.
Inventors
- 👤 Charles R Hoffman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 14:27
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/412; G11C11/413; G11C11/417; G11C11/419
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
284 words
In a read-write memory system of the type employing a plurality of storage cells, a read-write system for reading the binary content of the storage cell and for writing into the storage cell, said system including in combination: a. complementary switching means having first and second input connections for receiving binary signals and having first and second output connections which provide complementary binary output signals in response to binary input signals applied to said first and second input connections, b. write switching means connected to a write input terminal for receiving thereat a write command signal, said write switching means having first and second output connections which are connected respectively to said first and second input connections of said complementary switching means for establishing thereat a predetermined binary input signal condition in response to a write command signal applied to said write switching means, and c. data switching means connected to a data line for receiving data signals to be stored, said data switching means having first and second output connections which provide data and inverted data signals in response to input data signals applied to said data switching means, said first and second output connections of said data switching means Connected respectively to said first and second input connections of said complementary switching means, whereby said data and inverted data signals switch said complementary switching means to one of its two conductive states and thereby provide output signals at the first and second output connections of said complementary switching means, said output signals from said complementary switching means applied to said storage cell to write data into said storage cells in response to data and write command signals applied to said read-write system.
Claim 2
Dependent Claim
284 words
In a read-write memory system of the type employing a plurality of storage cells, a read-write system for reading the binary content of the storage cell and for writing into the storage cell, said system including in combination: a. complementary switching means having first and second input connections for receiving binary signals and having first and second output connections which provide complementary binary output signals in response to binary input signals applied to said first and second input connections, b. write switching means connected to a write input terminal for receiving thereat a write command signal, said write switching means having first and second output connections which are connected respectively to said first and second input connections of said complementary switching means for establishing thereat a predetermined binary input signal condition in response to a write command signal applied to said write switching means, and c. data switching means connected to a data line for receiving data signals to be stored, said data switching means having first and second output connections which provide data and inverted data signals in response to input data signals applied to said data switching means, said first and second output connections of said data switching means Connected respectively to said first and second input connections of said complementary switching means, whereby said data and inverted data signals switch said complementary switching means to one of its two conductive states and thereby provide output signals at the first and second output connections of said complementary switching means, said output signals from said complementary switching means applied to said storage cell to write data into said storage cells in response to data and write command signals applied to said read-write system.
Claim 3
Dependent Claim
71 words
The system defined in claim 1 which further includes: a. read gate means having first and second input connections which are connected respectively to said storage cell and to a read command terminal, said read gate means responsive to a read command signal and to the binary signal condition of said storage cell to provide a read output signal, and b. means coupling said read output signal to said data line.
Claim 4
Dependent Claim
45 words
The system defined in claim 2 wherein said coupling means includes a buffer device having a high input impedance, said buffer device further having an input electrode connected to the output of said read gate means and an output electrode connected to said data line.
Claim 5
Dependent Claim
153 words
THe system defined in claim 1 wherein said data switching means include: a. a first inverter connected to said data line for inverting the data signals thereon, said first inverter having the output thereof connected to said first input connection of said complementary switching means for applying inverted data signals thereto, and b. a second inverter connected to the output of said first inverter for reinverting said data signals, said second inverter having the output thereof connected to second input connection to said complementary switching means, whereby said first inverter applies an inverted data signal to said first input connection of said complementary switching means and said second inverter applies noninverted data signals to said second input connection of said complementary switching means, said inverted and noninverted data signals driving said complementary switching means to a fixed one of its two conductive states to thereby apply a differential signal to said storage cell.
Claim 6
Dependent Claim
102 words
The system defined in claim 1 where said write switching means includes: a. a first write inverter connected between a write command input terminal and said first input connection to said complementary switching means, and b. a second write inverter connected between said write command input terminal and said second input connection to said complementary switching means, said first and second write inverters simultaneously applying inverted write command signals to said first and second input connections to said complementary switching means and enable said complementary switching means during the presence of a write command signal applied to said write command input terminal.
Claim 7
Dependent Claim
123 words
The system defined in claim 1 wherein said complementary switching means includes: a. a first pair of metal-oxide-semiconductor MOS devices connected in series between a voltage supply terminal and a point of reference potential and having a first output terminal therebetween, and b. a second pair of metal-oxide-semiconductor MOS devices serially connected between a voltage supply terminal and a point of reference potential and having said second output terminal therebetween, said MOS devices in each pair alternately biased into conduction by signals applied to said first and second input connections to said complementary switching means, said pairs of MOS devices cross-coupled to provide bistable switching action upon receipt of binary signals at said first and second input connections to said complementary switching means.
Claim 8
Dependent Claim
104 words
The system defined in claim 6 wherein said write switching means includes: a. a first metal-oxide-semiconductor MOS inverter connected between said write command input terminal and said fIrst input connection to said complementary switching means, and b. a second metal-oxide-semiconductor MOS inverter connected between said write command terminal and said second input connection to said complementary switching means, said write command input terminal connected to receive a DC bias at a predetermined level in the absence of write command signals to bias said first and second MOS inverters into conduction and inhibit switching in both pairs of MOS devices in said complementary switching means.
Claim 9
Dependent Claim
156 words
The system defined in claim 7 wherein said data switching means include: a. a first MOS inverter connected to said data line for inverting data signals applied thereto, said first MOS inverter having an output terminal connected to said first input connection to said complementary switching means, and b. a second MOS inverter connected to said output terminal of said first inverter for reinverting signals at said output terminal of said first inverter, said second MOS inverter having an output terminal connected to said second input connection to said complementary switching means, whereby said first and second MOS inverters of said data switching means apply, respectively, inverted and noninverted data to said first and second input connections to said complementary switching means, said inverted and noninverted data being effective to switch said complementary switching means to a fixed one of its two bistable conductive states upon receipt of write command signals at said write switching means.
Claim 10
Dependent Claim
66 words
The system defined in claim 8 which further includes read gate means having first and second input terminals connected to receive, respectively, a read-command signal and binary data from said storage cell, said read gate means responsive to said read-command signal and to the binary signal condition of said storage cell to thereby provide a read output signal which is operatively coupled to said data line.
Claim 11
Dependent Claim
136 words
The system defined in claim 9 wherein: a. said read gate means includes a first metal-oxide-semiconductor MOS device connected to receive said read-command signal and further connected in parallel with a second metal-oxide-semiconductor MOS device, said second MOS device being connected to said storage cell, and b. a metal-oxide-semiconductor MOS buffer device connected between said first and second MOS devices in said read gate means and said data line, said MOS buffer device biased to conduction to drive said data line to the on voltage VON of said MOS buffer device only when a read-command signal is applied to said first MOS device in said read gate means and a predetermined potential is applied to said second MOS device in said read gate means in accordance with a predetermined binary signal condition of said storage cell.
References Cited (Backward Citations)
US3292008A
Cited
US3447137A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-07-19 | 1975-01-18 | 1975-07-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-07-19 | 1979-01-18 | 1979-07-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-07-19 | 1983-01-18 | 1983-07-20 | $7700.00 | Window Closed / Lapsed |