US3594651A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Quadriphase modem
Assignee: Comsat Corp
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Filing: 1969-10-15
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Granted: 1971-07-20
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Expires: 1989-10-15
Abstract
Abstract Apparatus responsive to a quadriphase modulated carrier generates a coherent reference signal having a fixed phase relation to the received carrier. The reference signal demodulates the received quadriphase modulated carrier. Prior to acquisition a phase-locked loop operates to lock the locally generated reference signal in phase with a received unmodulated portion of the carrier. Subsequent to acquisition the data detected by the demodulator remodulates the locally generated reference signal which is phase compared with the received quadriphase modulated carrier in the phase comparator of the phase-locked loop.
Inventors
- 👤 Chester J Wolejsza Jr
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 04:39
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2275; H04L27/2277
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
140 words
A quadriphase detector for detecting data represented by a received quadriphase modulated carrier comprising: a. a phase-locked loop responsive to a signal applied thereto for generating a coherent carrier signal having a fixed phase relation to said signal, b. means for applying said received quadriphase modulated carrier to said phase-lock loop, c. demodulation means having said received quadriphase modulated carrier and said coherent carrier applied thereto, for generating a pair of outputs corresponding to data bits represented by said received quadriphase modulated carrier, d. quadriphase modulation means, having said pair of outputs and said coherent carrier applied thereto, for modulating said coherent carrier in accordance with said data bits, and e. acquisition detection means connected to said phase-locked loop for inserting said quadriphase modulation means in said phase-locked loop when said coherent carrier is phase locked with said received carrier.
Claim 2
Dependent Claim
140 words
A quadriphase detector for detecting data represented by a received quadriphase modulated carrier comprising: a. a phase-locked loop responsive to a signal applied thereto for generating a coherent carrier signal having a fixed phase relation to said signal, b. means for applying said received quadriphase modulated carrier to said phase-lock loop, c. demodulation means having said received quadriphase modulated carrier and said coherent carrier applied thereto, for generating a pair of outputs corresponding to data bits represented by said received quadriphase modulated carrier, d. quadriphase modulation means, having said pair of outputs and said coherent carrier applied thereto, for modulating said coherent carrier in accordance with said data bits, and e. acquisition detection means connected to said phase-locked loop for inserting said quadriphase modulation means in said phase-locked loop when said coherent carrier is phase locked with said received carrier.
Claim 3
Dependent Claim
133 words
A quadriphase detector as claimed in claim 1 wherein said phase-locked loop comprises, a. a phase detector means for detecting the phase of two inputs applied thereto, one of said inputs being said received carrier, b. a voltage-controlled oscillator means, tuned to said received carrier frequency and connected to said phase detector, for generating a coherent carrier signal having a phase controlled by said phase detector output, said coherent carrier signal being connected as the other input to said phase detector, and wherein said acquisition detection means comprises switching means connected to said phase detector and responsive to the inputs to said phase detector being at a preset phase relationship for disconnecting said oscillator output from said phase detector input and connecting the output of said modulation means to said phase detector input.
Claim 4
Dependent Claim
129 words
A quadriphase detector as claimed in claim 2 wherein said demodulation means comprises, a. first means responsive to two equal frequency inputs for generating a bilevel output dependent upon the phase relation of said two inputs, b. second means responsive to two equal frequency inputs for generating a bilevel output dependent upon the phase relation of said two inputs, c. means for applying a reference carrier, having a fixed phase with respect to the output of said oscillator, as one input to said first means, d. means for applying a shifted reference carrier, having a phase quadrature relation to said reference carrier, as one input to said second means, and e. means for applying said received quadriphase modulated carrier as the second input to said first and second means.
Claim 5
Dependent Claim
138 words
A quadriphase detector as claimed in claim 3 wherein said quadriphase modulation means comprises, a. first modulating meaNs, connected to said bilevel output of said first means, for biphase modulating a signal connected to an input thereof. b. second modulating means, connected to said bilevel output of said second means, for biphase modulating a signal connected to an input thereof, c. means for applying a reference carrier, having a fixed phase with respect to the output of said oscillator, as the input to said first modulating means, d. means for applying a shifted reference carrier, having a phase quadrature relation to said reference carrier, as the input to said second modulating means, and e. summation means for summing the biphase modulated carriers from said first and second modulating means, said summation means output being a quadriphase modulated signal.
Claim 6
Dependent Claim
79 words
A quadriphase detector as claimed in claim 4 further comprising: a. a variable Q tank circuit tuned to an integer multiple of said data bit rate, b. differentiating means, connected to said bilevel outputs from said first and second means, for generating an output pulse in response to each data bit transition in said bilevel outputs, and c. means connecting said output pulses to said tank circuit to thereby synchronize said tank circuit frequency with said data bit rate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-07-19 | 1975-01-18 | 1975-07-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-07-19 | 1979-01-18 | 1979-07-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-07-19 | 1983-01-18 | 1983-07-20 | $7700.00 | Window Closed / Lapsed |