Data terminal processor

Claim 2

An electronic data terminal processor for operation with data display means having a cursor, keyboard means, data communication means, and addressable memory means for storing instructions for said processor and for storing information for display and information received from said keyboard means and information being transferred by way of said communication means, said data terminal processor comprising a. a memory address register for storing the address of a location in said addressable memory means which is to be accessed, b. a memory data register for storing information to be written into said addressable memory means and for storing information read from said memory means, c. a program counter for storing the address in said memory of an instruction to be performed, d. a cursor position register for storing cursor position information identifying the position of the cursor for said display means, e. arithmetic means for performing binary arithmetic operations with binary numbers and storing a resultant number therefrom, f. first connection means for applying to the arithmetic means information stored in any one of said memory address register, program counter, cursor position register and memory data register, g. second connection means for applying information stored in said arithmetic means to any one of said memory address register, memory data register, program counter and cursor Position register, and h. control means for selectively operating any of said registers and counter to transfer information to said arithmetic means via said first connection means and, further, to store information from said arithmetic means via said second connection means.

Claim 3

operating said memory-address generating means, during said processor displaying operation, to produce said memory addresses in accordance with said line position number so that characters to be displayed in said first line position are stored at memory locations associated with the first line-position.

Claim 4

operating said memory-address generating means, during said processor displaying operation, to produce said memory addresses in accordance with said line position number so that characters to be displayed in said first line position are stored at memory locations associated with the first line-position.

Claim 5

A data terminal processor as defined in claim 1 further comprising third connection means connected for applying information stored in said memory data register to said data display means.

Claim 6

A data terminal processor as defined in claim 1 further comprising a character position register storing character position information identifying the position on said display means at which a character is being displayed, said character position register being connected with said first connection means and said control means to apply said character position information to said arithmetic means.

Claim 7

A data terminal processor as defined in claim 3 in which said control means includes sequencing means for transferring said character position information from said character position register to said memory address register by way of said arithmetic means to form a memory address from said character position information, and alternatively for applying said cursor position information from said cursor register and said character position information from said character position register to said arithmetic means and for operating said arithmetic means to compare said two items of information, thereby to identify when said character position coincides with said cursor position.

Claim 8

A data terminal processor as defined in claim 3 in which said control means a. includes sequencing means for transferring said character position information from said character position register to said memory address register by way of said arithmetic means to form a memory address from said character position information, and b. is further arranged for operating said character position register, said arithmetic means, said memory address register, said memory data register and said memory for displaying with said display means characters stored in said memory at addresses identified by said character position information, said control means retaining the status of said program counter unchanged during said displaying operation.

Claim 9

A data terminal processor as defined in claim 1 comprising a further arithmetic register connected to receive information from said memory data register and to transfer information stored therein to said memory data register.

Claim 10

A data terminal processor as defined in claim 6 further comprising an input/output bus connected at one end with said keyboard means and connected at the other end to apply information from said keyboard means to said further arithmetic register and to apply information stored in said further arithmetic register to said keyboard.

Claim 11

A data terminal processor as defined in claim 3 in which a. said control means is operable in one of at least two modes, b. said control means operates in each said mode to formulate in said arithmetic means a memory location address, and to transfer said address to said memory address register, c. said control means operates in a first of said two modes to formulate said address in response to the contents of said program counter, and thereby to read into said memory data register instructions stored in said memory means at locations identified by the contents of said program counter, and d. said control means operates in the second of said two modes to formulate said address in response to the contents of said character position register, thereby to read into said memory data register character-identifying information stored in said memory means at locations identified by the contents of said character position register.

Claim 12

A data terminal processor as defined in claim 8 in which said control means maintains the contents of said program counter unchanged during operation in said second mode.

Claim 13

A data terminal processor as defined in claim 3 in which said character position register comprises a. first logic means containing a character number identifying the position along a display line on said display means where a character is to be displayed, b. second logic means containing a line number identifying the line on said display means at which a character is to be displayed, c. third logic means for storing a first line number identifying the first line on said display means at which a character is to be displayed, and d. logic comparison means connected with said second and third logic means and producing a number identifying the line at which a character is to be displayed relative to said first line.

Claim 14

A data terminal processor for operation in a data terminal having display means for displaying characters at line positions, and having addressable memory means for storing characters to be displayed with each character being stored at a memory location associated with the line position at which the character is to be displayed, said processor comprising a. memory-address generating means producing addresses for characters stored in said memory in accordance with the line position being displayed, b. logic means producing a line position number identifying the line position being operated on by said display means relative to a first line position above which there is to be no display, c. control means

Claim 15

A data terminal processor for operation in a data terminal having display means for displaying characters at line positions, and having addressable memory means for storing characters to be displayed with each character being stored at a memory location associated with the line position at which the character is to be displayed, said processor comprising a. memory-address generating means producing addresses for characters stored in said memory in accordance with the line position being displayed, b. logic means producing a line position number identifying the line position being operated on by said display means relative to a first line position above which there is to be no display, c. control means

Claim 16

A data terminal processor for operation in a data terminal having character display means, keyboard means and addressable memory means for storing characters selected with said keyboard means and characters to be displayed on said display means, said processor controlling information transfers between said display means, said keyboard means and said memory means, and controlling the display on said display means of characters stored in said memory means, and comprising a. start line register means for storing a start line number identifying the uppermost line of said display means at which characters are to be displayed, b. line register means for storing a line number identifying the line on said display means at which said display means is ready to display a character, c. compare means connected with said start line register means and with said line register means and producing a first comparison resultant only when said stored line number identifies a line on said display means at or below the line which said stored start line number identifies, and d. control means responsive to the comparison resultant of said compare means and enabling said processor to display characters on said display means only when said first resultant is present.

Claim 17

A data terminal processor for operation in a data terminal having character display means, keyboard means and addressable memory means for storing characters selected with said keyboard means and characters to be displayed on said display means, said processor controlling information transfers between said display means, said keyboard means and said memory means, and controlling the display on said display means of characters stored in said memory means, and comprising a. start line register means for storing a start line number identifying the uppermost line of said display means at which characters are to be displayed, b. line register means for storing a line number identifying the line on said display means at which said display means is ready to display a character, c. compare means connected with said start line register means and with said line register means and producing a first comparison resultant only when said stored line number identifies a line on said display means at or below the line which said stored start line number identifies, and d. control means responsive to the comparison resultant of said compare means and enabling said processor to display characters on said display means only when said first resultant is present.

Claim 18

A data terminal processor as defined in claim 12 in which a. said addressable memory means includes address register means and stores characters for display on said display means at a memory address corresponding to the line on said display means at which the character is displayed, and b. said compare means develops a difference number identifying the arithmetic difference between said stored line number and said stored start line number and applies said difference number to said address register means to form said character-locating memory address from said arithmetic difference.

Claim 19

A data teRminal processor as defined in claim 12 a. further comprising means for storing an identification of the last line on said display means at which characters are to be displayed, b. in which said compare means includes means for comparing the contents of said store means with the line number in said line register and for producing a second comparison resultant only when said stored line number identifies a line on said display means below the last line which said store means identifies, and c. in which said control means disables said processor from displaying characters on said display means when said second resultant is present.

Claim 20

A data terminal processor as defined in claim 12 a. further comprising last line means for signalling said control means when said stored line number identifies a line on said display means below the last line at which characters are to be displayed, and b. in which said control means disables said processor from displaying characters on said display means when signalled by said last-line means.

Claim 21

A data terminal processor for operation in a data terminal having character display means that sweeps a character-displaying beam sequentially through character-displaying line-positions thereon, and further having keyboard means and addressable memory means for storing characters selected with said keyboard means and characters to be displayed on said display means, said processor controlling information transfers between said display means, said keyboard means and said memory means, and controlling the display on said display means of characters stored in said memory means, and comprising a. compute logic means for reading instructions from said memory means and executing said instructions, b. display logic means for reading character-identifying information from said memory means and applying it to said display means for displaying the identified character, c. character position register means storing information identifying the line on said display means at which said display means is ready to display a character, d. boundary line register means for storing the identification of a line on said display means beyond which, in a first direction, characters are not to be displayed, and e. control means responsive to the contents of said character position register means and of said boundary register means, and both enabling said display logic means and disabling said compute logic means only when said character position register means stores the identification of a line at or beyond, in the direction opposite to said first direction, the boundary line identified by said information stored in said boundary line register means.

Claim 22

A data terminal processor for operation in a data terminal having character display means that sweeps a character-displaying beam sequentially through character-displaying line-positions thereon, and further having keyboard means and addressable memory means for storing characters selected with said keyboard means and characters to be displayed on said display means, said processor controlling information transfers between said display means, said keyboard means and said memory means, and controlling the display on said display means of characters stored in said memory means, and comprising a. compute logic means for reading instructions from said memory means and executing said instructions, b. display logic means for reading character-identifying information from said memory means and applying it to said display means for displaying the identified character, c. character position register means storing information identifying the line on said display means at which said display means is ready to display a character, d. boundary line register means for storing the identification of a line on said display means beyond which, in a first direction, characters are not to be displayed, and e. control means responsive to the contents of said character position register means and of said boundary register means, and both enabling said display logic means and disabling said compute logic means only when said character position register means stores the identification of a line at or beyond, in the direction opposite to said first direction, the boundary line identified by said information stored in said boundary line register means.

Claim 23

A data terminal processor for operation in a data terminal having character display means that sweeps a character-displaying beam sequentially through character-displaying line positions and interline spaces thereon, and further having keyboard means and addressable memory means for storing characters selected with said keyboard means and characters to be displayed on said display means, said processor controlling information transfers between said display means, said keyboard means and said memory means, and controlling the display on said display means of characters stored in said memory means, and comprising a. compute logic means for reading instructions from said memory means and executing said instructions, b. display logic means for reading character-identifying information from said memory means and applying it to said display means for displaying the identified character, c. character position register means storing information identifying the line and space position on said display means at which said display means is sweeping said display beam, d. control means for operating said character position register to store a number identifying the line-position being swept on said character display means, and e. decoding means responsive To the contents of said character position register, and both enabling said display logic means and disabling said compute logic means when said character position register means stores the identification of a line position, and alternatively both disabling said display logic means and enabling said compute logic means when said character position register means stores the identification of an interline space.

Claim 24

A data terminal processor for operation in a data terminal having character display means that sweeps a character-displaying beam sequentially through character-displaying line positions and interline spaces thereon, and further having keyboard means and addressable memory means for storing characters selected with said keyboard means and characters to be displayed on said display means, said processor controlling information transfers between said display means, said keyboard means and said memory means, and controlling the display on said display means of characters stored in said memory means, and comprising a. compute logic means for reading instructions from said memory means and executing said instructions, b. display logic means for reading character-identifying information from said memory means and applying it to said display means for displaying the identified character, c. character position register means storing information identifying the line and space position on said display means at which said display means is sweeping said display beam, d. control means for operating said character position register to store a number identifying the line-position being swept on said character display means, and e. decoding means responsive To the contents of said character position register, and both enabling said display logic means and disabling said compute logic means when said character position register means stores the identification of a line position, and alternatively both disabling said display logic means and enabling said compute logic means when said character position register means stores the identification of an interline space.

Claim 25

A data terminal processor as defined in claim 17 for operation with display means that sweeps said beam through plural line-segment traces for at least each line position, and a. in which said control means include timing means producing timing signals for controlling the beam-sweeping of said display means, b. in which said character position register includes a character counter receiving counting signals from said timing means for storing the identification of the character-displaying position of said sweep along each said trace, and further includes a segment counter advanced by said character counter each time said character counter counts through the number of character positions along a trace, c. further comprising a line counter advanced by said segment counter when said segment counter is advanced through the number of traces in one line plus the number of traces in one interline space, d. in which said decoding means decodes the count in said segment counter, e. further comprising boundary line register means for storing the identification of a line position on said display means beyond which, in a first direction, characters are not to be displayed, and f. further comprising means for comparing the contents of said line counter and said boundary line register means and for enabling said display logic means only when said line counter stores the identification of a line position on said display means at or beyond the line position identified by said boundary line means in the direction opposite to said first direction.

Claim 26

A data terminal processor for operation in a data terminal having display means for displaying characters at line positions separated by interline spaces, and having addressable memory means, said processor comprising a. processor control means operable to cause the processor to fetch from said memory and to execute programmed instructions, and alternatively to read character identifications from said memory and deliver them to said display means for displaying the identified character, b. logic means storing information identifying whether said display means is operating at a line position or at an interline space, and c. further control means responsive to said information in said logic means and signalling said processor control means to perform said fetch and execute operations when said logic means identifies a space and alternatively signalling said processor control means to perform said character reading operations when a line position is identified.

Claim 27

A data terminal processor for operation in a data terminal having display means for displaying characters at line positions separated by interline spaces, and having addressable memory means, said processor comprising a. processor control means operable to cause the processor to fetch from said memory and to execute programmed instructions, and alternatively to read character identifications from said memory and deliver them to said display means for displaying the identified character, b. logic means storing information identifying whether said display means is operating at a line position or at an interline space, and c. further control means responsive to said information in said logic means and signalling said processor control means to perform said fetch and execute operations when said logic means identifies a space and alternatively signalling said processor control means to perform said character reading operations when a line position is identified.

Claim 28

A data terminal processor for operation in a data terminal having display means for displaying characters at line positions, and having addressable memory means for storing characters to be displayed with each character being stored at a memory location associated with the line position at which the character is to be displayed, said processor comprising a. memory address register means for directing read and write operations in said memory means to the memory location identified by the contents thereof, b. memory data register means for storing information to be written into said memory means and for storing information read from said memory means, c. program register means for storing the address in said memory means of an instruction to be performed, d. cursor position register means for storing the display position of the cursor for said display means, e. arithmetic means connected for performing arithmetic operations on the number stored in any one of said aforementioned register means and for trAnsferring a resultant number thereto, f. position register means for storing the display position at which said display means is operating and connected to apply the contents thereof to said arithmetic means, g. control means operative in a compute mode and alternatively in a refresh mode, said control means operating in said compute mode to transfer memory address information from said program register means to said memory address register means by way of said arithmetic means, and h. said control means operating in said refresh mode to transfer memory address information to said memory address register means from said position register, to transfer information read from said memory means to said display means, and to compare in said arithmetic means the contents of said cursor position means for signalling said display means to display a cursor pattern.

Claim 29

A data terminal processor for operation in a data terminal having display means for displaying characters at line positions, and having addressable memory means for storing characters to be displayed with each character being stored at a memory location associated with the line position at which the character is to be displayed, said processor comprising a. memory address register means for directing read and write operations in said memory means to the memory location identified by the contents thereof, b. memory data register means for storing information to be written into said memory means and for storing information read from said memory means, c. program register means for storing the address in said memory means of an instruction to be performed, d. cursor position register means for storing the display position of the cursor for said display means, e. arithmetic means connected for performing arithmetic operations on the number stored in any one of said aforementioned register means and for trAnsferring a resultant number thereto, f. position register means for storing the display position at which said display means is operating and connected to apply the contents thereof to said arithmetic means, g. control means operative in a compute mode and alternatively in a refresh mode, said control means operating in said compute mode to transfer memory address information from said program register means to said memory address register means by way of said arithmetic means, and h. said control means operating in said refresh mode to transfer memory address information to said memory address register means from said position register, to transfer information read from said memory means to said display means, and to compare in said arithmetic means the contents of said cursor position means for signalling said display means to display a cursor pattern.