US3593304A
Expired / Lapsed
US
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Data store with logic operation
Assignee: International Business Machines Corp
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Filing: 1968-07-01
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Granted: 1971-07-13
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Expires: 1988-07-01
Abstract
Abstract This disclosure teaches a memory that performs logical operations by combining two or more words of data in a single storage location or on a storage signal carrying wire such that the data signals combine in ways that have logical significance. Threshold logic circuits are connected with the memory signal wires to propagate carries for addition or subtraction.
Inventors
- 👤 Peter A E Gardner
- 👤 Michael H Hallett
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 17:44
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/50; G06F7/505; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/411; G11C11/4116; G11C11/413; G11C11/414; G11C11/416; G11C19/00; G11C19/28; G06F2207/00; G06F2207/38; G06F2207/48; G06F2207/4802; G06F2207/4818; G06F2207/4822
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
134 words
A data store having a row and column array of bit conductors and word conductors connected with storage devices of the type that produce signals on the bit conductors representing a word of data when a word conductor of one or more words are energized for an interrogate operation and that respond to said bit conductor signals to write said word of data into a different location when a word conductor of said different location is energized, wherein the improvement comprises, a threshold lOgic circuit for each bit position connected to respond to the voltage levels produced on a bit conductor during an interrogate operation and to produce a signal at an input of a different one of said threshold circuits according to a predetermined logic function of a plurality of simultaneously interrogated words.
Claim 2
Dependent Claim
134 words
A data store having a row and column array of bit conductors and word conductors connected with storage devices of the type that produce signals on the bit conductors representing a word of data when a word conductor of one or more words are energized for an interrogate operation and that respond to said bit conductor signals to write said word of data into a different location when a word conductor of said different location is energized, wherein the improvement comprises, a threshold lOgic circuit for each bit position connected to respond to the voltage levels produced on a bit conductor during an interrogate operation and to produce a signal at an input of a different one of said threshold circuits according to a predetermined logic function of a plurality of simultaneously interrogated words.
Claim 3
Dependent Claim
38 words
A store according to claim 1 in which said logic function is the majority logic function and said logic circuits are interconnected to propagate the carry function of two words to be added or subtracted in the memory.
Claim 4
Dependent Claim
54 words
A store according to claim 2 in which each said bit position includes a pair of bit wires and said storage devices are connected to energize one or the other of the associated bit wires during an interrogate operation according to whether the storage device is in a one or a zero storing state.
Claim 5
Dependent Claim
57 words
A store according to claim 3 in which each of said logic circuits comprise a pair of transistors differentially connected to the associated bit conductor pair to conduct in one of two states to the storage states of the associated bits of the two interrogated words and the conduction state of any next lower order logic circuit.
Claim 6
Dependent Claim
86 words
A store according to claim 4 in which said storage devices include transistors having their emitter terminals connected to said bit conductors and said transistors of said logic circuits have their collector terminals connected to said bit conductors, whereby conduction of a storage device transistor and conduction of a logic circuit transistor have opposing effects on the signal level on a bit conductor, and means connecting the collector terminal of each logic circuit transistors to the complementary valued bit conductor for the next higher bit position.
Claim 7
Dependent Claim
40 words
A store according to claim 2 further including a discriminator circuit for detecting the sum of the two words being added when said two words and a third word storing the results of a previous carry propagation are simultaneously interrogated.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-07-12 | 1975-01-11 | 1975-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-07-12 | 1979-01-11 | 1979-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-07-12 | 1983-01-11 | 1983-07-13 | $7700.00 | Window Closed / Lapsed |