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US3592045A Expired / Lapsed US ⏱️ 0.0 years remaining

Process analysis programmer

Assignee: Leeds and Northrup Co
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Filing: 1968-12-12
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Granted: 1971-07-13
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Expires: 1988-12-12
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Abstract

Abstract A digital programmer adapted to program functions in chromatography, uses a function counter to actuate each of the functions and a master counter as the cycle clock, all operable from a single-pulse generator. During a setup cycle, each function counter is started when its function occurs. Alternatively, reversible counters are started in reverse counting at time zero, and stopped at the desired time of the function during the setup cycle. In subsequent cycles, the zero count of that counter is used to program its corresponding function. The count in any function counter may be altered relative to the master counter during subsequent cycles for program updating or error correction, either manually or automatically.

Inventors

  • 👤 Edward L Weiss

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 10:44
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/07; G01; G01N; G01N30/00; G01N30/02; G01N30/88; G05B19/43; G05B19/44; G01N2030/8804

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 215 words
In combination with combination a process chromatography system for measuring the constituents of a sample including a sample injector, a sample detector responsive to said constituents, and control elements which are actuated in timed sequence with the detection of said constituents during a run cycle, a programmer for programming a plurality of sequential functions to be performed by said control elements, said programmer comprising: a source of repetitive pulses, a cycle counter having a zero count stage, a plurality of function counters each having a zero count stage, means for apPlying pulses from said source to said cycle function counter and said function counters in timed relation with the actuation of said sample injector, means for applying said pulses to said function counters during a setup cycle so that the count in said counters, after said setup cycle, represents the desired time occurrence relative to sample injection of said functions to be performed, means for applying said pulses to said counters during said run cycle so that actuation of said zero count stage of each of said function counters occurs at the time that the associated function is to be performed relative to sample injection, and means responsive to actuation of said zero count stage of each function counter for controlling an associated control element.
Claim 2
Dependent Claim 215 words
In combination with combination a process chromatography system for measuring the constituents of a sample including a sample injector, a sample detector responsive to said constituents, and control elements which are actuated in timed sequence with the detection of said constituents during a run cycle, a programmer for programming a plurality of sequential functions to be performed by said control elements, said programmer comprising: a source of repetitive pulses, a cycle counter having a zero count stage, a plurality of function counters each having a zero count stage, means for apPlying pulses from said source to said cycle function counter and said function counters in timed relation with the actuation of said sample injector, means for applying said pulses to said function counters during a setup cycle so that the count in said counters, after said setup cycle, represents the desired time occurrence relative to sample injection of said functions to be performed, means for applying said pulses to said counters during said run cycle so that actuation of said zero count stage of each of said function counters occurs at the time that the associated function is to be performed relative to sample injection, and means responsive to actuation of said zero count stage of each function counter for controlling an associated control element.
Claim 3
Dependent Claim 75 words
The system recited in claim 1 wherein each of said function counters is a reversible counter, switch means for switching said counters to a reverse counting mode during said setup cycle and to the forward counting mode during said run cycle, said system further comprising: switch means operable at the time of occurrence of the functions to be performed to terminate the supply of pulses to each of said function counters during a setup cycle.
Claim 4
Dependent Claim 59 words
THe system recited in claim 1 wherein each of said function counters is a one-way counter, said system further comprising: switch means operable at the time of occurrence of a function during a setup cycle to initiate the supply of pulses to the function counter which controls that function, said last-named means being enabled only during a setup cycle.
Claim 5
Dependent Claim 85 words
The system recited in claim 1 further including correction circuitry comprising: a correction counter, pulses from said source being supplied to said correction counter during a correction cycle, an AND gate, pulses from said source being selectively supplied through said AND gate to a function counter which is to be corrected, and means for inhibiting said AND gate when said correction counter has stepped through selected stages so that only a selected number of pulses are supplied to said function counter during a correction cycle.
Claim 6
Dependent Claim 62 words
The system recited in claim 4 wherein each of said function counters is a reversible counter, said system further comprising a manually operated switch selectively operated to supply pulses from said AND gate to a function counter in either the forward or reverse counting mode so that correction pulses can be added to or subtracted from the count in said function counter.
Claim 7
Dependent Claim 91 words
The system recited in claim 4 wherein each of said function counters is a reversible counter, said system further comprising : an extra pulse source responsive to said source of pulses for producing extra pulses, an AND gate connected between said source of pulses and a function counter to be corrected for inhibiting the supply of pulses to said function counter, and means for selectively actuating said extra pulse source or said AND gate to add or to delete pulses from the count in said function counters during a run cycle.
Claim 8
Dependent Claim 147 words
The system recited in claim 1 further including automatic updating circuitry comprising: level discriminator means, the output of said sample detector being applied to said level discriminator means, said level discriminator means producing a first output when the output of said sample detector is below a first given level, said level discriminator means producing a second, different, output when the output of said sample detector is above a second given level, first means for deleting at least one pulse from said repetitive pulses which are supplied to said function counters, second means for supplying at least a double pulse to the supply of repetitive pulses applied to said function counter, and coincidence circuitry connected to the output of said level discriminator means for selectively enabling said first means in response to said first output and for selectively enabling said seconD means in response to said second output.
Claim 9
Dependent Claim 34 words
The system recited in claim 7 further comprising: a differentiating amplifier interposed between said sample detector and said level discriminators for modifying said sample detector output to represent the rate of change of constituent.
Claim 10
Dependent Claim 134 words
The system recited in claim 1 further including alarm circuitry indicating that the time spacing between the detection of two constituents is below a desired minimum time comprising: an elapsed time counter means for starting the counting of said elapsed time counter in response to actuation of the zero count stage of one of said function counters, level discriminating means producing a first output if the output of said sample detector is above a given level when the zero count state of said function counter is actuated and producing a second output if the output of said sample detector is above a given minimum when the zero count stage of said elapsed time counter is actuated, and an alarm actuated only when said level discriminating means produces both of said outputs during a cycle.
Claim 11
Dependent Claim 53 words
The system recited in claim 9 wherein the zero count stage of said function counter initiates the sample detector zero balance of said system, said elapsed time counter having a number of stages such that the counting time of said elapsed time counter is sufficient for said zero balance operation to be performed.
Claim 12
Dependent Claim 65 words
The system recited in claim 9 further comprising: first and second alarm flip-flops said first and second outputs of said level discriminating means being applied to set said first and second flip-flops respectively, said alarm being actuated by the set condition of both of said flip-flops, and means for resetting said flip-flops if only one of said flip-flops has been set during a particular cycle.
Claim 13
Dependent Claim 72 words
The system recited in claim 1 wherein said cycle counter includes a first count stage further comprising: a manually operated start switch for initiating a train of pulses from said source, means for detecting the actuation of the first count stage of said cycle counter by a pulse from said source, and means to control sample injection in said system in response to detection of said actuation of the first count stage.
Claim 14
Dependent Claim 58 words
The system recited in claim 1 further including a bistable fluid logic circuitry which is set in time relation with the application of pulses from said source to said cycle counter, and a fluid-mechanical actuator connected to said fluid logic circuit, said actuator being connected to actuate said sample injector when said bistable fluid logic circuit is set.
Claim 15
Dependent Claim 77 words
The system recited in claim 13 wherein said fluid logic circuit responds to said train of pulses from said source, the first count stage of said cycle counter being connected to said bistable fluid logic circuit to set it to a ''''1'''' output upon the occurrence of the pulse in said train which actuates said first count stage, the ''''1'''' output of said fluid logic circuitry being applied to said fluid-mechanical actuator to initiate said sample injection.
Claim 16
Dependent Claim 75 words
The system recited in claim 1 further including means for displaying the time of occurrence of each function performed during a run cycle comprising: an indicating device, gating circuitry connected between the stages of said cycle counter and said indicating device so that said indicating device normally displays the count in said cycle counter, and means for inhibiting said gating circuitry in response to actuation of the zero count stage of a selected function counter.
Claim 17
Dependent Claim 168 words
In a process control system wherein control elements are actuated in timed sequence, a programmer for programming said control element in the desired time sequence comprising: a cycle counter having a zero count stage, a plurality of function counters each having a zero count stage, said cycle counter and said function counters being supplied with rePetitive pulses from a common source, means for applying said pulses to said function counters during a setup cycle so that the count in said counters, after said setup cycle, represents the desired time occurrence relative to the beginning of the cycle of said functions to be performed, means for applying said pulses to said counters during a run cycle so that actuation of said zero count stage of each of said function counters occurs at the time that the associated function is to be performed relative to the beginning of the cycle, and means responsive to actuation of said zero count stage of each function counter for controlling an associated control element.
Claim 18
Dependent Claim 168 words
In a process control system wherein control elements are actuated in timed sequence, a programmer for programming said control element in the desired time sequence comprising: a cycle counter having a zero count stage, a plurality of function counters each having a zero count stage, said cycle counter and said function counters being supplied with rePetitive pulses from a common source, means for applying said pulses to said function counters during a setup cycle so that the count in said counters, after said setup cycle, represents the desired time occurrence relative to the beginning of the cycle of said functions to be performed, means for applying said pulses to said counters during a run cycle so that actuation of said zero count stage of each of said function counters occurs at the time that the associated function is to be performed relative to the beginning of the cycle, and means responsive to actuation of said zero count stage of each function counter for controlling an associated control element.
Claim 19
Dependent Claim 28 words
The programmer recited in claim 16 wherein said cycle and function counters and said means for applying pulses to said function and cycle counters include electronic logic circuitry.

References Cited (Backward Citations)

US3116456A Cited
US3309678A Cited
US3316751A Cited
US3343136A Cited
US3306096A Cited
US3383525A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-07-12 1975-01-11 1975-07-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-07-12 1979-01-11 1979-07-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-07-12 1983-01-11 1983-07-13 $7700.00 Window Closed / Lapsed

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