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US3590345A Expired / Lapsed US ⏱️ 0.0 years remaining

Double wall pn junction isolation for monolithic integrated circuit components

Assignee: Westinghouse Electric Corp
•
Filing: 1969-06-25
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Granted: 1971-06-29
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Expires: 1989-06-25
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Abstract

Abstract Described is a system for electrically isolating discrete components of a monolithic integrated circuit one from the other by a pair of spaced diffused walls of the same conductivity type as the substrate for the integrated circuit and surrounding a discrete circuit component such as a transistor, diode or resistor. The inner diffused wall is electrically shorted to the material into which it is diffused to greatly reduce the gain of substrate parasitic transistor configurations and to reduce lateral parasitic transistor currents.

Inventors

  • 👤 Joe E Brewer
  • 👤 Charles L Laughinghouse

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 02:34
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/63; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/085; Y10S148/096; Y10S148/151

Claims Analysis

Total Claims: 1
Claim 1
Independent Claim 54 words
The isolation moat structure of claim 1 wherein said substrate is of P-type material, said layer of semiconductive material is epitaxially deposited N-type material, said spaced walls are P-type diffused regions formed in said epitaxial layer, said buried region is of N+ type material and the region of said component is of P-type material.

References Cited (Backward Citations)

US3502951A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-28 1974-12-28 1975-06-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-28 1978-12-28 1979-06-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-28 1982-12-28 1983-06-29 $7700.00 Window Closed / Lapsed

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