Breakdown preventing circuit and an integrated device thereof for a semiconductor device having an insulate gate electrode

Claim 2

A protecting circuit device for a semiconductor device having an insulated gate electrode comprising the combination of: a semiconductor substrate of a first conductivity type; an insulating film covering at least one portion of the surface of said substrate; a gate electrode formed on said insulating film; a semiconductor region of a second conductivity type formed in the surface of said substrate, the reverse breakdown voltage of a PN junction formed between said region and said substrate being lower than the breakdown voltage of said insulating film; a resistive means connected between said region and said gate electrode and having a resistance value sufficient to provide, in the circuit path across said insulating film below said gate electrode, a time constant larger than that of a transient response curve which reaches the breakdown voltage of the insulating film below said gate electrode at the moment when the voltage applied across said PN junction reaches the reverse breakdown voltage of the PN junction; and a conducting means for receiving an input signal connected to said region of said second conductivity type.

Claim 3

The device according to claim 3, wherein said resistive means has a resistance value sufficient to provide, in the circuit path across said insulating film below said gate electrode, a time constant larger than that of the circuit path across said PN junction.

Claim 4

A breakdown preventing circuit device for a semiconductor device having an insulated gate electrode comprising: a semiconductor substrate of a first conductivity type; an insulating film formed over at least a portion of the surface of said substrate; a gate electrode formed on said film; a resistive region of a second conductivity type opposite to said first conductivity type formed in one portion of the surface of said substrate; contacts connected ohmically to at least two different portions of said resistive region; means for connecting one of said contacts to said gate electrode; and an input means connected to the other one of said contacts for supplying an input signal voltage thereto; the reverse breakdown voltage of a PN junction formed between said substrate and said region of said second conductivity type being lower than the breakdown voltage of the insulating film under said gate electrode.

Claim 5

An insulated gate type field effect transistor having a protective circuit device which comprises: a semiconductor substrate of a first conductivity type having a main surface; a source and a drain region of a second conduCtivity type formed in the main surface of said substrate; an insulating film formed on the surface of said substrate between said source and drain regions; a gate electrode provided on said insulating film; a source and a drain electrode connected to said source and drain regions, respectively; a semiconductor region of the second conductivity type formed in the surface of said substrate and spaced from said source and drain regions, a PN junction being formed between said substrate and said semiconductor region; an input signal supplying means connected to said semiconductive region; and a resistive means connected between said semiconductive region and said gate electrode and having a resistance value sufficient to provide, in the circuit path across said insulating film below said gate electrode, a time constant larger than that of a transient response curve which reaches the breakdown voltage of the insulating film below said gate electrode at the moment when the voltage applied across said PN junction reaches the reverse breakdown voltage of the PN junction.

Claim 6

An insulated gate type field effect transistor according to claim 6, wherein said substrate consists essentially of an N-type silicon, said insulating film consist of a silicon compound, and the resistance value of said resistive means is selected within the range of 100 Omega to 10 k Omega .

Claim 7

An insulated gate type field effect transistor having a protective circuit device which comprises: a semiconductor substrate of a first conductivity type having a main surface; a first, a second and a third semiconductor region of a second conductivity type opposite to the first conductivity type formed separately in the main surface of said substrate; an insulating film covering the main surface of said substrate between said first and second regions; a gate electrode formed on said insulating film; a source and a drain electrode provided on the surface of said first and second regions, respectively; a first and a second electrode means provided separately on the surface of said third region, the region between said first and second electrode means operating as a resistor, the reverse breakdown voltage of at least a portion near the second electrode means and of the PN junction formed between the semiconductor substrate and the third region being lower than the breakdown voltage of the insulating film below said gate electrode; a conductive means connecting said gate electrode with said first electrode means; and an input signal supplying means connected to said second electrode means.

Claim 8

An insulating gate type field effect transistor according to claim 7, wherein said substrate consists essentially of an N-type silicon, all said regions are P-type diffused silicon regions, and said insulating film consists essentially of a silicon compound.

Claim 9

An insulating gate type field effect transistor according to claim 9, wherein the resistance value of said third region between said first and second electrode means is selected within the range of 100 Omega to 10 k Omega .

Claim 10

A breakdown preventing circuit for a semiconductor device having an insulated electrode, comprising: a semiconductor substrate in said semiconductor device, said substrate having at least one semiconductor region of a resistivity different from said substrate, an insulating film covering at least one portion of a surface of said substrate, said electrode being disposed on said insulating film; and breakdown preventing means connected with the circuit path from said electrode across said film to said at least one region within said substrate including rectifying means having a reverse breakdown voltage smaller than the breakdown voltage of said insulating film under said electrode, and means operatively connected with said rectifying means and with said insulated electrode for providing a relative time delay in a signal applied Through said circuit path across said film to assure that the breakdown voltage caused by a signal applied to both the rectifying means and the insulated electrode occurs earlier in the rectifying means than across said insulating film.

Claim 11

A breakdown preventing circuit according to claim 11, characterized in that said time delay providing means includes a resistive component connected to said electrode.

Claim 12

A breakdown preventing circuit according to claim 12, characterized in that said resistive component is formed in said substrate.

Claim 13

An integrated circuit which includes a substrate, a region within said substrate having a resistivity different from said substrate, an insulating film over a portion of said substrate, an electrode on at least a portion of said insulating film, rectifying means formed in said substrate, characterized by circuit means for connecting the circuit path formed between said electrode and said region within said substrate across said insulating film in parallel with the circuit path formed by said rectifying means and for providing such relative time delay in said circuit path across said insulating film so as to assure earlier voltage breakdown in said rectifying means than across said insulating film.

Claim 14

An integrated circuit according to claim 14, characterized in that said circuit means is formed in effect within said substrate.

Claim 15

An integrated circuit according to claim 15, characterized in that said circuit means is constituted by a diffused impurity region in said substrate having a predetermined resistance.

Claim 16

An integrated circuit according to claim 16, characterized in that said rectifying means is constituted by a PN junction formed in said substrate.

Claim 17

An integrated circuit according to claim 14, characterized in that said circuit means is constituted by a diffused impurity region in said substrate having a predetermined resistance.

Claim 18

A breakdown preventing circuit for a semiconductor device having an insulated gate electrode comprising the combination of: a semiconductor device comprising a semiconductor substrate, at least one region within said substrate having a resistivity different from said substrate, an insulating film covering at least one portion of the surface of said substrate and a gate electrode formed on said insulating film; a rectifying element connected between said substrate and said gate electrode, said rectifying element having a reverse breakdown voltage smaller than the breakdown voltage of said insulating film under said gate electrode; and a time constant controlling means consisting substantially of a resistor connected between said rectifying element and said gate electrode, the resistance value of said resistor being selected such that the time constant determined by the resistance value of said resistor and the capacitance between said at least one region within said substrate and said gate electrode is larger than that of the circuit path across said rectifying element.

Claim 19

A protecting circuit device for a semiconductor device having an isolated gate electrode comprising the combination of: a semiconductor substrate of a first conductivity type; an insulating film covering at least one portion of the surface of said substrate; a gate electrode formed on said insulating film; a first semiconductor region of a second conductivity type formed in the surface of said substrate, the reverse breakdown voltage of a PN junction formed between said region and said substrate being lower than the breakdown voltage of said insulating film; a resistive means including an elongated, second semiconductor region of the second conductivity type formed in one portion of said substrate surface and a pair of terminals connected ohmically to each end portion of said region, the pair of terminals being connected to said first semiconductor region and said gate electrode, respectively; and a conducting means for receiving an input signal operaTingly connected to said first semiconductor region of the second conductivity type.

Claim 20

A protecting circuit device for a semiconductor device having an isolated gate electrode comprising the combination of: a semiconductor substrate of a first conductivity type; an insulating film covering at least one portion of the surface of said substrate; a gate electrode formed on said insulating film; a first semiconductor region of a second conductivity type formed in the surface of said substrate, the reverse breakdown voltage of a PN junction formed between said region and said substrate being lower than the breakdown voltage of said insulating film; a resistive means including an insulating film formed on the surface of said substrate, a resistive material deposited on said film, both end portions of said resistive material, being connected to said first semiconductor region and said gate electrode, respectively; and a conducting means for receiving an input signal operatingly connected to said region of the second conductivity type.

Claim 21

A semiconductor device comprising: a semiconductor substrate of a first conductivity type having at least one semiconductor region of a resistivity different from said substrate; a field effect semiconductor component including an insulating film formed on a surface of said substrate, a conductive layer formed on the insulating film; a protecting layer component including a region contacting said substrate of said first conductivity type to form a rectifying barrier having a breakdown voltage lower than the breakdown voltage of said insulating film between said conductive layer and said semiconductor region within said substrate; an electrode means ohmically connected to said substrate; a first, conducting means for electrically connecting said region of said protecting component with said conductive layer of said field effect semiconductor component; a second, conducting means for connecting said electrode means with a common reference potential; an input terminal to which an input is applied; a third, conducting means for connecting said input terminal with said region of said protecting component; and fourth means operatively connected with said field effect semiconductor component and said protective component for increasing the relative time constant of the equivalent circuit appearing between said region of said protecting component and said common reference potential and crossing said insulating film below said conductive layer of said field effect semiconductor component to a value larger than that of the equivalent circuit appearing between said region of said protecting component and the common reference potential and crossing said rectifying barrier.