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US3586980A Expired / Lapsed US ⏱️ 0.0 years remaining

Frequency modulation-demodulation circuit

Assignee: Emerson Electric Co
•
Filing: 1967-11-13
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Granted: 1971-06-22
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Expires: 1987-11-13
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Abstract

Abstract The frequency modulation (FM) signal received by an FM receiver contains the basic signal frequency, noise in the form of amplitude disturbances, and the audio signal as the frequency modulator. The receiver, by means such as a limiter circuit, produces a series of square wave pulses whose repetition rate is dependent upon the frequency deviation, i.e., the modulation signal. Then, in a discriminator counter detector circuit, the square wave pulse is differentiated to the form of a sharp pulse by means such as a differential network. The pulse may then be amplified by means such as a pulse amplifier; the width of the pulse- but not its height- is expanded by an expanding circuit; and then the pulse may be integrated by an integrating circuit. The output of the integrating circuit is the demodulated audio signal.

Inventors

  • 👤 Friedrich J Krausser

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 01:25
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/02; H03D3/04

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 255 words
A broadband, low noise counter detector demodulator for a frequency modulation radio receiver in which an intermediate frequency FM signal is applied to said demodulator for detection comprising: a limiter circuit for producing substantially uniform height pulses at the same repetition frequency as the frequency of the applied intermediate frequency FM signal, said frequency being nominally in the center of the FM band, said pulses having a rise and fall time substantially smaller than the pulse width; a differential circuit responsive to said pulses produced by said limiter for producing relatively sharp pulses; a broad band, one-stage transistor pulse amplifier employing controlled feedback between collector and base and responsive to the pulses produced by said differential circuit, said pulse amplifier including a series capacitor for coupling to a succeeding stage from the transistor collector electrode, said amplifier for amplifying the pulses produced by said differential circuit without deteriorating pulse rise and fall time; a pulse expander circuit responsive to said amplified pulses using a single transistor of predEtermined storage characteristics, said transistor having its base electrode connected to a series circuit including a diode and a currentlimiting resistor, said series circuit being connected to circuit common, said base electrode being connected to said coupling capacitor of said amplifier stage, said coupling capacitor and series circuit forming a controlled biasing circuit for determining the amount of storage of said expander circuit so that the desired expansion of pulses is effected; and an integrating circuit responsive to the expanded pulses for producing a demodulated audio output signal.
Claim 2
Dependent Claim 255 words
A broadband, low noise counter detector demodulator for a frequency modulation radio receiver in which an intermediate frequency FM signal is applied to said demodulator for detection comprising: a limiter circuit for producing substantially uniform height pulses at the same repetition frequency as the frequency of the applied intermediate frequency FM signal, said frequency being nominally in the center of the FM band, said pulses having a rise and fall time substantially smaller than the pulse width; a differential circuit responsive to said pulses produced by said limiter for producing relatively sharp pulses; a broad band, one-stage transistor pulse amplifier employing controlled feedback between collector and base and responsive to the pulses produced by said differential circuit, said pulse amplifier including a series capacitor for coupling to a succeeding stage from the transistor collector electrode, said amplifier for amplifying the pulses produced by said differential circuit without deteriorating pulse rise and fall time; a pulse expander circuit responsive to said amplified pulses using a single transistor of predEtermined storage characteristics, said transistor having its base electrode connected to a series circuit including a diode and a currentlimiting resistor, said series circuit being connected to circuit common, said base electrode being connected to said coupling capacitor of said amplifier stage, said coupling capacitor and series circuit forming a controlled biasing circuit for determining the amount of storage of said expander circuit so that the desired expansion of pulses is effected; and an integrating circuit responsive to the expanded pulses for producing a demodulated audio output signal.
Claim 3
Dependent Claim 26 words
The circuit of claim 1 wherein the limiter is an overdriven integrated circuit amplifier producing square wave shaped pulses having negligible rise time and fall time.
Claim 4
Dependent Claim 38 words
The circuit of claim 1 wherein said nominal intermediate frequency FM center frequency is approximately 10.7 megacycles and said rise and fall times of said limiter output pulses are approximately 10 percent of the width of said pulses.
Claim 5
Dependent Claim 70 words
The circuit as described in claim 1 wherein said pulse amplifier includes an input coupling capacitor connected to the base electrode of said transistor, a load resistor connected to the collector of said transistor, and a feedback network connected between collector electrode and base electrode, said feedback network including a series resistor in series with a parallel-connected resistor and capacitor, the emitter of said transistor being connected to circuit common.
Claim 6
Dependent Claim 31 words
The circuit of claim 1 wherein said pulse expander transistor includes a load resistor connected to said collector electrode and wherein said emitter of said transistor is connected to circuit common.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-21 1974-12-21 1975-06-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-21 1978-12-21 1979-06-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-21 1982-12-21 1983-06-22 $7700.00 Window Closed / Lapsed

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