Five layer gate controlled thyristor with novel turn on characteristics

Claim 2

A thyristor according to claim 1 additionally including dielectric means located adjacent a portion of said semiconductive element laterally offset from said first major contact and overlying said first endmost layer and said junction bridging conductive path providing means.

Claim 3

A thyristor according to claim 1 in which said gate is associated with a central portion of said second major surface of said semiconductive element and said first endmost layer is annular and spaced outwardly from said gate.

Claim 4

A thyristor according to claim 1 additionally including series resistance means associated with said first intermediate layer to insure uniform peripheral turn on of said main zone thereof.

Claim 5

A thyristor according to claim 1 in which said first endmost layer is divided into a first segment next adjacent to said main zone serving as a charge injection source and a laterally spaced second segment spaced from said main zone by said first segment, said second segment constricting the width of said first intermediate layer adjacent thereto to increase the lateral resistance of said first intermediate layer.

Claim 6

A thyristor according to claim 1 additionally including means associated with the periphery of said semiconductive element for reducing surface currents.

Claim 7

A thyristor according to claim 1 in which said first endmost layer is located laterally inwardly of said main zone and in which beveled peripheral edge means of said semiconductive element is provided for reducing surface potential gradients.

Claim 8

A thyristor according to claim 1 additionally including a main current carrying terminal means, conductive plate means interposed between said terminal means and said first major contact, and dielectric means associated with said semiconductive element positioning said conductive plate means relative to said terminal means.

Claim 9

A thyristor comprised of a semiconductive element including five layers of one and the opposite conductivity type extending between opposed major surfaces, said layers being interleaved with adjacent layers being of opposite conductivity type and forming a plurality of PN junctions, said layers including a first endmost layer and a first intermediate layer next adjacent thereto, said first intermediate layer including a main zone and an auxiliary zone having said endmost layer interposed therebetween and an injection zone integrally uniting said main and auxiliary zones, a first major contact ohmically associated with said main zone, means providing a junction bridging conductive path from said auxiliary zone to said first endmost layer. a second major contact ohmically associated with a second endmost of said layers, said second endmost layer including a main portion and an auxiliary portion, said first and second major contacts, said main portion, and said main zone being associated with overlapping areas of said opposed major surfaces, said second major contact, said auxiliary portion, said auxiliary zone, and said conductive path means being associated with overlapping areas of said opposed major surfaces, and a gate contact ohmically associated with an intermediate layer other than said first intermediate layer at a location laterally offset form said main zone by said injection zone.

Claim 10

A thyristor comprised of a semiconductive element including five layers of one and the opposite conductivity type extending between opposed major surfaces, said layers being interleaved with adjacent layers being of opposite conductivity type and forming a plurality of PN junctions, said layers including a first endmost layer and a first intermediate layer next adjacent thereto, said first intermediate layer including a main zone and an auxiliary zone having said first endmost layer interposed therebetween and an injection zone integrally uniting said main and auxiliary zones, a second endmost layer being divided by a second intermediate layer next adjacent thereto into an auxiliary segment and a main segment, first means providing a junction bridging conductive path from said auxiliary zone to said first endmost layer, second means providing a junction bridging conductive path from said auxiliary segment to a portion of said second intermediate layer adjacent said main segment, a first major contact ohmically associated with said main zone, a second major contact ohmically associated with said main segment, said first and second main contacts, said main zone, and said main segment being associated with overlapping areas of said opposed major surfaces, said first conductive path means, said auxiliary zone, and said auxiliary segment being associated with overlapping areas of said opposed major surfaces, said first endmost layer being located in lateral proximity to said main segment, and a gate contact ohmically associated with an intermediate layer other than said first intermediate layer at a location offset from said main conduction zone by said injection zone.

Claim 11

A thyristor according to claim 10 in which said auxiliary segment of said second endmost layer is divided into a first auxiliary segment and a laterally spaced second auxiliary segment, said first auxiliary segment being associated with said second conductive path means and said second auxiliary segment being laterally spaced from and interposed between said first auxiliary segment and said main segment constricting the width of said second intermediate layer adjacent thereto to increase the lateral resistance of said second intermediate layer.

Claim 12

A thyristor comprised of a semiconductive element including five layers of one and the opposite conductivity type extending between opposed major surfaces, said layers being interleaved with adjacent layers being of opposite conductivity type and forming a plurality of PN junctions, said layers including a first endmost layer and a first intermediate layer next adjacent thereto, said first endmost layer being formed as a plurality of laterally spaced first segments, said first intermediate layer including a main zone extending between said laterally spaced first segments, an auxiliary zone separated from said main zone by one of said first segments, and a plurality of injection zones lying interiorly of said first segments, said zones being integrally joined, a first major contact ohmically associated with said main zone, means providing a junction bridging conductive path from said auxiliary zone to a plurality of said first segments, additional contact means ohmically associated with a second endmost of said layers including a main portion and an auxiliary portion said auxiliary portion, said auxiliary zone, said conductive path means, and said additIonal contact means being associated with overlapping areas of said opposed major surfaces, said first major contact, said main portion, said main zone, and said additional contact means being associated with overlapping areas of said opposed major surfaces, and a gate contact ohmically associated with an intermediate layer other than said first intermediate layer at a location offset from said main zone by one of said injection zones.

Claim 13

A thyristor according to claim 13 in which a second intermediate layer adjacent said second endmost layer divides said main portion and said auxiliary portion thereof into laterally spaced relation and said additional contact means includes a second major contact associated with said main portion and means providing a junction bridging conductive path from said auxiliary portion to a portion of said second intermediate layer separating said main and auxiliary portions.

Claim 14

A thyristor according to claim 13 in which said auxiliary segments are integrally joined.

Claim 15

A thyristor according to claim 13 in which said auxiliary segments are integrally joined and said conductive path means is comprised of conduction means ohmically associated with said semiconductive element at the integral joinder of said auxiliary segments.

Claim 16

A thyristor according to claim 13 in which said auxiliary segments are located adjacent spaced edge portions of said main zone and said auxiliary segments include interconnecting means.

Claim 17

A thyristor according to claim 13 in which a plurality of auxiliary zones are provided each separated from said main zone by one of said auxiliary segments.

Claim 18

A thyristor comprised of a semiconductor crystal including five layers of one and the opposite conductivity type extending between opposed major surfaces, said layers being interleaved with adjacent layers being of opposite conductivity type and forming a plurality of PN junctions, said layers including a first endmost layer and first intermediate layer next adjacent thereto, said first endmost layer being formed as a plurality of laterally spaced active portions, said first intermediate layer including a main zone extending between said laterally spaced active portions, a plurality of auxiliary zones each separated from said main zone by one of said active portions, and an injection zone lying directly interiorly of said first endmost layer integrally joining said zones, a first major contact ohmically associated with said main zone, first means providing a junction bridging conductive path from each of said auxiliary zones to adjacent of said active portions, a second endmost layer being divided by a second intermediate layer next adjacent thereto into a main segment and an auxiliary segment including spaced active auxiliary portions, second means providing a junction bridging conductive path from said spaced active auxiliary portions to said second intermediate layer adjacent said main segment, a second major contact ohmically associated with said main segment, said first and second main contacts, said main zone, and said main segment being associated with overlapping areas of said opposed major surfaces, said first conductive path means, said auxiliary zones, and said auxiliary segment being associated with overlapping areas of said opposed major surfaces, said active portions being located with an edge in lateral proximity to said main segment, and a gate contact ohmically associated with an intermediate layer other than said first intermediate layer at a location laterally offset from said main conduction zone by one of said injection zones.

Claim 19

A semiconductor switch comprising a single semiconductive crystal means having integrated therein a remote gate main current carrying thyristor crystal means and an auxiliary thyristor crystal means, each of said thyristor crystal means including a first emitter layer, a first base layer, a second base layer, and a secOnd emitter layer sequentially related, adjacent layers being of opposite conductivity type and forming a plurality of PN junctions therebetween, corresponding layers of main and auxiliary thyristor crystal means being integrally related, said main thyristor crystal means additionally including a gate layer forming an endmost layer adjacent said first emitter layer and lying adjacent the joinder of said thyristor crystal means, gate means associated with one of said base layers of said auxiliary thyristor means, means providing a junction bridging conductive path from said auxiliary first emitter layer to said main gate layer, a major current carrying contact ohmically associated with said main first emitter layer, and additional contact means ohmically associated with said second emitter layers.

Claim 20

A semiconductor switch comprising a single semiconductive crystal means having integrated therein a remote gate main current carrying thyristor crystal means and an auxiliary thyristor crystal means, said remote gate main current carrying thyristor means including a gate layer, a first emitter layer, a first base layer, a second base layer, and a second emitter layer sequentially related, adjacent layers being of opposite conductivity type and forming a plurality of PN junctions therebetween, said auxiliary thyristor means including a first emitter layer, a first base layer, a second base layer, and a second emitter layer sequentially related, adjacent layers being of opposite conductivity type and forming a plurality of PN junctions therebetween, corresponding layers of said main and auxiliary thyristor means being integrally related with said gate layer lying adjacent the joinder of said thyristor means, gate means associated with one of said base layers of said auxiliary thyristor means, common current carrying terminal means associated with said second emitter layers of said thyristor means, separate current carrying terminal means associated with each of said first emitter layers of said thyristor means and laterally spaced from said gate layer, and means for providing a conductive path between said auxiliary thyristor separate terminal means and an edge of said gate layer adjacent said auxiliary thyristor means for laterally biasing said gate layer in response to a signal supplied to said gate means so that charge injection by said gate layer into said anode base layer preferentially occurs along an edge closest to said terminal means associated with said first emitter layer of said main thyristor means.

Claim 21

A semiconductor switch according to claim 21 in which said auxiliary thyristor means is located adjacent opposed lateral extremities of said main current carrying thyristor means.

Claim 22

A semiconductor switch according to claim 21 additionally including means isolating said junction bridging conductive path means from conductive association with said terminal means other than through said semiconductive crystal means.

Claim 23

A semiconductor switch comprising a single semiconductive crystal means having integrated therein a remote gate main current carrying thyristor crystal means and an auxiliary thyristor crystal means, each of said thyristor crystal means including a first emitter layer, a first base layer, a second base layer, and a second emitter layer sequentially related, adjacent layers being of opposite conductivity type and forming a plurality of PN junctions therebetween, said main thyristor crystal means additionally including a gate layer forming an endmost layer adjacent said first emitter layer and lying adjacent the joinder of said thyristor crystal means, said first emitter and base layers of thyristor crystal means being integrally related and said second emitter layers of said main and auxiliary thyristor crystal means being laterally spaced, gate means associated with one of said base layers of said auxiliary thyristor crystal means, firSt means providing a junction bridging conductive path from said auxiliary first emitter layer to said main gate layer, second means providing a junction bridging conductive path from said auxiliary second emitter layer to a portion of said second base layer adjacent said main second emitter layer, and major contacts ohmically associated with said main emitter layers.