US3586922A
Expired / Lapsed
US
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Multiple-layer metal structure and processing
Assignee: Fairchild Semiconductor Corp
•
Filing: 1969-10-31
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Granted: 1971-06-22
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Expires: 1989-10-31
Abstract
Abstract The metal conductors used on an integrated circuit containing multiple layers of metallization, are all produced with sloped sides and rounded edges by use of a special etchant, a mixture of phosphoric, nitric and acetic acids.
Inventors
- 👤 Larry R Johnson
- 👤 Robert M Whelton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:51
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/435; H10P; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/02; Y10S148/049; Y10S148/051; Y10S148/053; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
22 words
Structure as in claim 1 in which said semiconductor die comprises two layers of conductive leads and said selected number is two.
Claim 2
Dependent Claim
22 words
Structure as in claim 1 in which said semiconductor die comprises three layers of conductive leads and said selected number is three.
Claim 3
Dependent Claim
12 words
Structure as in claim 1 in which said semiconductor die comprises silicon.
Claim 4
Dependent Claim
22 words
Structure as in claim 4 in which said plurality of layers of conductive leads comprise a plurality of layers of aluminum leads.
Claim 5
Independent Claim
147 words
The method of producing on a wafer a layer of conductive leads, each lead having sloping sides and rounded edges, comprising: depositing a layer of metal over a dielectric layer on said wafer, said layer of metal adhering to said dielectric layer; masking said layer of metal to define the conductive pattern of said leads while leaving unmasked the other portions of said layer of metal; submerging said wafer in an etching solution for removing the unmasked portions of said layer of metal and for removing the mask defining the conductive pattern at a selected rate, thereby to etch the metal exposed while lifting said conductive-pattern-defining mask material from said metal layer and thus sloping the sides and rounding the edges of the conductive leads; and, removing said wafer containing said etched metal layer from said solution after the unmasked metal has been removed by the etchant.
Claim 6
Dependent Claim
12 words
The method as in claim 6 wherein said metal layer is aluminum.
Claim 7
Dependent Claim
23 words
The method as in claim 7 wherein said etchant is a mixture of phosphoric, nitric and acetic acids heated to a selected temperature.
Claim 8
Dependent Claim
18 words
The method of claim 8 wherein said mixture of acids is heated to between 60* and 110* C.
Claim 9
Dependent Claim
20 words
The method of claim 8 wherein said mixture of acids is heated to a temperature between 70* and 100* C.
Claim 10
Dependent Claim
38 words
The method of claim 10 wherein said phosphoric acid comprises between about 55 to 75 percent by volume concentrated phosphoric acid, with the remaining percentage by volume being approximately equally divided between nitric and acetic acid, both concentrated.
Claim 11
Dependent Claim
50 words
The method of claim 10 wherein said phosphoric acid comprises between about 55 to 75 percent by volume of said etchant, said nitric acid comprises between 15 to 30 percent by volume of said etchant, and said acetic acid comprises the remainder of said etchant, all said acids being concentrated.
Claim 12
Dependent Claim
43 words
The method as in claim 10 wherein said phosphoric acid comprises about 60 percent by volume of said etchant, said nitric acid comprises between 15 to 30 percent by volume of said etchant, and said acetic acid comprises the remainder of said etchant.
Claim 13
Dependent Claim
125 words
A semiconductor die comprising a plurality of layers of conductive leads, intervening dielectric layers separating each layer of conductive leads being from adjacent layers of conductive leads and a first dielectric layer composed of one or more dielectric materials separating the bottom layer of conductive leads from the underlying semiconductor material, leads in said conductive layers selectively contacting leads in adjacent conductive layers through holes in the intervening dielectric layers, and said bottom layer of conductive layers of conductive leads selectively contacting regions in the underlying semiconductor material through windows in said first dielectric layer, each lead in each conductive layer, below the top conductive layer, having sloping sides and rounded edges, and leads passing over underlying leads making gradual transitions over said underlying leads.
Claim 14
Dependent Claim
53 words
A semiconductor device comprising a semiconductor chip containing a plurality of layers of conductive leads separated from each other and the semiconductor chip by electrically insulating materials, said device characterized in that: the conductive leads in a selected number of said plurality of layers of conductive leads have sloped sides and rounded edges.
Claim 15
Dependent Claim
24 words
Structure as in claim 15 wherein the conductive leads in all said plurality of layers of conductive leads have sloped sides and rounded edges.
Claim 16
Dependent Claim
49 words
In a semiconductor device comprising a semiconductor chip containing a plurality of layers of conductive leads separated from each other and the semiconductor chip by electrically insulating materials, the improvement comprising: the conductive leads in a selected number of said plurality of layers of conductive leads having sloped sides.
Claim 17
Dependent Claim
21 words
Structure as in claim 17 wherein the conductive lead in all said plurality of layers of conductive leads have sloped sides.
Claim 18
Dependent Claim
39 words
Structure as in claim 17 wherein the sides of the conductive leads in said selected number of said plurality of layers of conductive leads form an angle of 70* or less with the top surface of said semiconductor chip.
Claim 19
Dependent Claim
39 words
The structure of claim 17 wherein the sides of said conductive leads in said selected number of said plurality of layers of conductive leads form an angle of 45* or less with the top surface of said semiconductor chip.
Claim 20
Dependent Claim
36 words
Structure as in claims 17 wherein the sides of the conductive leads in said selected number of said plurality of layers of conductive leads form angles of about 30* with the top surface of said chip.
Claim 21
Dependent Claim
40 words
Structure as in claim 1 wherein the sloped sides of the conductive leads in said selected number of said plurality of layers of conductive leads form an angle of 70* or less with the top surface of said semiconductor die.
Claim 22
Dependent Claim
40 words
The structure of claim 1 wherein the sloped sides of the conductive leads in said selected number of said plurality of layers of conductive leads form an angle of 45* or less with the top surface of said semiconductor die.
Claim 23
Dependent Claim
38 words
Structure as in claims 1 wherein the sloped sides of the conductive leads in said selected number of said plurality of layers of conductive leads form angles of about 30* with the top surface of said semiconductor die.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-06-21 | 1974-12-21 | 1975-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-06-21 | 1978-12-21 | 1979-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-06-21 | 1982-12-21 | 1983-06-22 | $7700.00 | Window Closed / Lapsed |