US3586844A
Expired / Lapsed
US
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Electronic slide rule
Assignee: Madatron Princeton Inc
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Filing: 1968-06-05
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Granted: 1971-06-22
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Expires: 1988-06-05
Abstract
Abstract A system for performing mathematical computations based upon logarithmic principles. A magnetic drum, or other suitable memory means, is provided with pulses spaced in logarithmic fashion to represent the C-scale. The second track of the memory is provided with pulses spaced in such a manner as to represent the L-scale. The performance of a multiplication operation, for example, takes place by: inserting the multiplicand and multiplier into two registers; developing a count in accordance with the C-scale pulses in a first counter and simultaneously therewith inserting pulses from the L-scale track into an accumulator; terminating the count in the first counter and clearing the counter as soon as the count in the first counter and the multiplicand compare; when the first counter is cleared, pulses from the C and L-scale are then inserted into the first counter and the accumulator, respectively; this continues until the count in counter 1 compares with the multiplier in register B, at which time the operation is terminated; the count accumulated in the first counter is then cleared, and L-scale and C-scale pulses are then inserted into the first counter and a second counter, respectively; as soon as the count in the first counter compares with the count in the accumulator, the operation is terminated and a binary-to-decimal converter is activated, coupling the output of the second counter to a character display and/or printer for visual observation. A division operation is performed in a similar manner, except that the L-scale pulses representing the divisor are subtracted from the first group of pulses accumulated, representing the dividend. Operations such as sine, cosine and tangent functions may be performed in a similar manner.
Inventors
- 👤 Richard B Hanbicki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 23:29
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/60; G06F7/62; G06J; G06J1/00
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
157 words
Electronic means for performing mathematical operations upon input information comprising: memory means; first means responsive to said memory means for generating equispaced electrical pulses; second means response to said memory means for generating nonequispaced electrical pulses simultaneously with the operation of said first means, the pulse rates generated by said first and second means being related in a predetermined fashion; third means for receiving and storing said input information in the form of electrical signals representative of a numerical quantity; accumulator means coupled to said first means for storing said equispaced pulses; fourth means including a counter connected only to the output of said second means for storing pulses received from said second means and means responsive to the counts in said counter and said third means for terminating the accumulation of said equispaced pulses in said accumulator means when the numBer of nonequispaced pulses applied to said counter equals the numerical quantity in said third means.
Claim 2
Dependent Claim
157 words
Electronic means for performing mathematical operations upon input information comprising: memory means; first means responsive to said memory means for generating equispaced electrical pulses; second means response to said memory means for generating nonequispaced electrical pulses simultaneously with the operation of said first means, the pulse rates generated by said first and second means being related in a predetermined fashion; third means for receiving and storing said input information in the form of electrical signals representative of a numerical quantity; accumulator means coupled to said first means for storing said equispaced pulses; fourth means including a counter connected only to the output of said second means for storing pulses received from said second means and means responsive to the counts in said counter and said third means for terminating the accumulation of said equispaced pulses in said accumulator means when the numBer of nonequispaced pulses applied to said counter equals the numerical quantity in said third means.
Claim 3
Dependent Claim
83 words
The device of claim 1 wherein said first means comprises a first information group stored in a first location in said memory means representative of said equispaced pulses and first readout means for sensing and converting said first information into said equispaced electrical pulses; said second means comprising a second information group stored in a second location in said memory means representative of said nonequispaced pulses and second readout means for sensing and converting said second information group into said nonequispaced electrical pulses.
Claim 4
Dependent Claim
107 words
The device of claim 2 wherein said memory means comprises a movable surface and means for moving said surface; said first means comprises a first pattern representing said equispaced pulses aligned along said surface, said first readout means sensing said first pattern as it passes said first readout means for converting the first pattern sensed into equispaced electrical pulses; said second means comprising a second pattern representing said nonequispaced pulses being aligned along said surface in spaced relationship to said first pattern, said second readout means sensing said second pattern as it passes said second sensing means for converting said second pattern sensed into nonequispaced electrical pulses.
Claim 5
Dependent Claim
18 words
The device of claim 3 further comprising means for driving said drum memory at a predetermined angular velocity.
Claim 6
Dependent Claim
18 words
The device of claim 4 wherein said nonequispaced pattern is logarithmically spaced relative to said constant spaced pattern.
Claim 7
Dependent Claim
161 words
Electronic apparatus for performing mathematical operations upon input information in the form of numerical quantities comprising: continuously moving memory means; first means coupled to said memory means for generating equispaced electrical pulses; second means coupled to said memory means for generating nonequispaced electrical pulses simultaneously with the operation of said first means; third means associated with said first means for counting and storing said equispaced pulses; fourth means including register means for receiving and storing said input information and fifth means for receiving and counting the pulses generated by said second means; and means coupled to said register means and said fifth means for terminating the receipt of electrical pulses being stored by said third means when the number of electrical pulses received accumulated in said fifth means is equal to the first numerical quantity stored in said register means to thereby accumulate a count in said third means representing the logarithm of the numerical quantity stored in said register means.
Claim 8
Dependent Claim
161 words
Electronic apparatus for performing mathematical operations upon input information in the form of numerical quantities comprising: continuously moving memory means; first means coupled to said memory means for generating equispaced electrical pulses; second means coupled to said memory means for generating nonequispaced electrical pulses simultaneously with the operation of said first means; third means associated with said first means for counting and storing said equispaced pulses; fourth means including register means for receiving and storing said input information and fifth means for receiving and counting the pulses generated by said second means; and means coupled to said register means and said fifth means for terminating the receipt of electrical pulses being stored by said third means when the number of electrical pulses received accumulated in said fifth means is equal to the first numerical quantity stored in said register means to thereby accumulate a count in said third means representing the logarithm of the numerical quantity stored in said register means.
Claim 9
Dependent Claim
58 words
The apparatus of claim 6 further comprising first settable means for controlling said apparatus to perform a multiplication operation; said third means comprising a bidirectional counter; means responsive to said first settable means for controlling the direction in which said bidirectional counter is stepped to form the numeric sum of the logarithmic quantities fed to said third means.
Claim 10
Dependent Claim
51 words
The apparatus of claim 7 further comprising second settable means for controlling said apparatus to perform a division operation; means responsive to said second settable means for controlling the direction in which said bidirectional counter is stepped to form the numeric difference of the logarithmic quantities fed to said third means.
Claim 11
Dependent Claim
217 words
Electronic apparatus for performing mathematical operations upon input information in the form of numeric quantities comprising: a surface; a first pattern of equispaced indicia being provided on said surface; a second pattern of nonequispaced indicia bearing a predetermined relationship to said first pattern being provided on said surface; first and second sensing means for respectively sensing said first and second patterns; means for moving said surface at A predetermined rate relative to said sensing means whereby said first and second sensing means are caused to generate signals at a rate determined by the moving patterns which they sense; an accumulator coupled to said first sensing means for counting the signals generated by said first sensing means; a counter coupled to said second sensing means for counting the signals generated by said second sensing means; a first register for temporarily storing one of the numeric quantities to be operated upon; comparison means coupled to said register and said counter for generating a terminating signal when the counts in said register and said counter are equal; gating means normally coupling the output of said first sensing means to said accumulator, said gating means having a control input coupled to said comparison means for decoupling said first sensing means from said accumulator when said control input receives said terminating signal.
Claim 12
Dependent Claim
217 words
Electronic apparatus for performing mathematical operations upon input information in the form of numeric quantities comprising: a surface; a first pattern of equispaced indicia being provided on said surface; a second pattern of nonequispaced indicia bearing a predetermined relationship to said first pattern being provided on said surface; first and second sensing means for respectively sensing said first and second patterns; means for moving said surface at A predetermined rate relative to said sensing means whereby said first and second sensing means are caused to generate signals at a rate determined by the moving patterns which they sense; an accumulator coupled to said first sensing means for counting the signals generated by said first sensing means; a counter coupled to said second sensing means for counting the signals generated by said second sensing means; a first register for temporarily storing one of the numeric quantities to be operated upon; comparison means coupled to said register and said counter for generating a terminating signal when the counts in said register and said counter are equal; gating means normally coupling the output of said first sensing means to said accumulator, said gating means having a control input coupled to said comparison means for decoupling said first sensing means from said accumulator when said control input receives said terminating signal.
Claim 13
Dependent Claim
101 words
The apparatus of claim 9 further comprising means coupled to said comparison means for clearing said counter and said first register when said terminating signal is detected; a second register for storing a second numeric quantity to be operated upon; means decoupling said comparison means for said first register and coupling said comparison means to said second register, whereby said accumulator again receives signals from said first sensing means until the counts in said second register and said counter are equal, causing said gating means to decouple said first sensing means from said accumulator when said terminating signal is again received.
Claim 14
Dependent Claim
78 words
The apparatus of claim 9 further comprising a second register for storing a second numeric quantity to be operated upon; programming means coupled to said comparison means for coupling said second register to said comparison means and decoupling said first register from said comparison means and for resetting said counter when said terminating signal is detected, whereby said accumulator receives signals from said first sensing means until the counts in said counter and said second register are equal.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-06-21 | 1974-12-21 | 1975-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-06-21 | 1978-12-21 | 1979-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-06-21 | 1982-12-21 | 1983-06-22 | $7700.00 | Window Closed / Lapsed |