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US3585534A Expired / Lapsed US ⏱️ 0.0 years remaining

Microstrip delay line

Assignee: Sprague Electric Co
•
Filing: 1968-05-17
•
Granted: 1971-06-15
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Expires: 1988-05-17
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Abstract

Abstract The characteristic impedance of a microstrip delay line is controlled by altering the effective area of the ground plane. Reducing the effective ground plane area increases the characteristic impedance and improves the output rise time while maintaining a nearly constant time delay.

Inventors

  • 👤 George A Senf

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 17:46
CPC Classifications
H; H01; H01P; H01P3/00; H01P3/02; H01P3/08; H01P3/081; H01P9/00

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 113 words
A delay line comprising a substantially planar dielectric substrate, a first electrical conductor disposed to form a distributed inductance pattern on one surface of said diElectric substrate, and a second electrical conductor disposed on the opposite surface of said dielectric substrate in capacitive relation to said first conductor so as to encompass the surface area directly opposing the perimeter of said distributed inductance pattern, and wherein the second conductor is patterned by uniformly dispersed holes therethrough such that said second conductor covers less than the entire surface area opposing the perimeter of the distributed inductance thereby increasing the line impedance and improving the rise time characteristics with substantially no change in delay time.
Claim 2
Dependent Claim 113 words
A delay line comprising a substantially planar dielectric substrate, a first electrical conductor disposed to form a distributed inductance pattern on one surface of said diElectric substrate, and a second electrical conductor disposed on the opposite surface of said dielectric substrate in capacitive relation to said first conductor so as to encompass the surface area directly opposing the perimeter of said distributed inductance pattern, and wherein the second conductor is patterned by uniformly dispersed holes therethrough such that said second conductor covers less than the entire surface area opposing the perimeter of the distributed inductance thereby increasing the line impedance and improving the rise time characteristics with substantially no change in delay time.
Claim 3
Dependent Claim 77 words
A delay line as described in claim 1 wherein said first electrical conductor is a thin film of a conductive material screened onto the surface of a ceramic substrate in a spiral pattern and wherein said second electrical conductor is a thin film of conductive material screened onto the opposing surface of the ceramic substrate over an area equal to that bounded by the spiral perimeters, said conductive film covering more than 25 percent of said area.
Claim 4
Dependent Claim 24 words
A delay line as described in claim 2 wherein said ceramic base is selected from the group consisting of titanium dioxide and barium titanate.
Claim 5
Dependent Claim 27 words
The delay line of claim 1 wherein said first electrical conductor is disposed to form at least two distributed inductance spiral patterns coupled in series enhancing mode.
Claim 6
Dependent Claim 48 words
The delay line of claim 1 wherein said second conductor comprises a first series of uniformly spaced parallel conducting lines and a second series of uniformly spaced parallel conducting lines wherein the lines of said second series contact the lines of said first series at substantially right angles.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-14 1974-12-14 1975-06-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-14 1978-12-14 1979-06-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-14 1982-12-14 1983-06-15 $7700.00 Window Closed / Lapsed

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