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US3585512A Expired / Lapsed US ⏱️ 0.0 years remaining

Frequency discriminator to eliminate the effect of noise pulse width modulations

Assignee: International Standard Electric Corp
•
Filing: 1969-05-13
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Granted: 1971-06-15
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Expires: 1989-05-13
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Abstract

Abstract To eliminate the effects of noise width modulations, the input FM pulse signals are applied to a PNP transistor the duration of whose output pulses is each extended for a period equal to the ''''turnoff'''' time. These extended pulses are combined in an AND gate with the input pulse signals leaving pulses of a constant width equal to the ''''turnoff'''' time. The latter pulses are applied to an NPN transistor whose ''''turnoff'''' time (storage time + fall time) after each pulse is such that the leading edge of the next pulse coincides with some point on the current fall time (voltage rise time) in the NPN-transistor which point varies with the pulse frequency. Frequency centering of the discriminator is accomplished by feeding back the integrated output voltage to the base of the second-mentioned transistor to control its ''''turnoff'''' time.

Inventors

  • 👤 Gerhard Gunter Gassmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 22:08
CPC Classifications
H; H03; H03K; H03K9/00; H03K9/06

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 167 words
A frequency discriminator comprising: a source of input pulse signals; a first transistor coupled to said source having a given delay in changing between its saturated and nonconductive states in response to input pulses, to thereby produce delayed pulse signals; an AND gate coupled to said source and to the output of said first transistor for producing output pulse signals each having a constant width equal to said given delay; and means responsive to the frequency of said constant width output pulse signals for producing an output that changes in amplitude with variations in said frequency, said means includes a second transistor also having a given delay in changes between its saturated and nonconductive states, the given delay of said second transistor being such that the application of a leading edge of each pulse to the second transistor occurs during the fall-time of the collector current of said first transistor and at a point during said current fall which varies with the frequency of said pulse signals.
Claim 2
Dependent Claim 167 words
A frequency discriminator comprising: a source of input pulse signals; a first transistor coupled to said source having a given delay in changing between its saturated and nonconductive states in response to input pulses, to thereby produce delayed pulse signals; an AND gate coupled to said source and to the output of said first transistor for producing output pulse signals each having a constant width equal to said given delay; and means responsive to the frequency of said constant width output pulse signals for producing an output that changes in amplitude with variations in said frequency, said means includes a second transistor also having a given delay in changes between its saturated and nonconductive states, the given delay of said second transistor being such that the application of a leading edge of each pulse to the second transistor occurs during the fall-time of the collector current of said first transistor and at a point during said current fall which varies with the frequency of said pulse signals.
Claim 3
Dependent Claim 15 words
A frequency discriminator according to claim 1, wherein said transistors are of opposite conductivity type.
Claim 4
Dependent Claim 57 words
A frequency discriminator according to claim 1, further including means coupled to the output of said second transistor for producing an output voltage; and means for feeding back at least a portion of said output voltage to said second transistor to vary said given delay thereof and to thereby control the center frequency of its discriminating curve.

References Cited (Backward Citations)

US2905815A Cited
US2958788A Cited
US3098936A Cited
US3022461A Cited
US3185931A Cited
US3226570A Cited
US3392337A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-14 1974-12-14 1975-06-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-14 1978-12-14 1979-06-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-14 1982-12-14 1983-06-15 $7700.00 Window Closed / Lapsed

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