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US3585504A Expired / Lapsed US ⏱️ 0.0 years remaining

Electrical signalling system

Assignee: British Telecommunications Research Ltd
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Filing: 1968-10-07
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Granted: 1971-06-15
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Expires: 1988-10-07
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Abstract

Abstract The invention is concerned with bandwidth and/or time compression of data signals, particularly facsimile signals having two levels only. The basis of the invention is to convert the binary facsimile signals into a multilevel signal. One method involves allocating of alternate levels of the multilevel signal to each of the two binary signal levels and arranging for transitions of the multilevel signal to be in the same direction when the corresponding binary transitions are close together. Another arrangement exploits the fact that the majority of white plus black run-length produced by scanning printed text are more than twice the length of the majority of black run-lengths. In this arrangement, alternate transitions are transmitted in different panels.

Inventors

  • 👤 Howard Mumford
  • 👤 Marcus P Barton

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 06:09
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/41; H04N1/411; H04N1/413; H04N1/4135

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 176 words
An electrical signalling system for transmission of a facsimile signal derived from an original having no intermediate tones in which the facsimile signal is a binary signal of which one condition represents the image and the other condition represents the background, comprising: modulating means for generating a carrier signal modulated to one of a first plurality of alternate modulation levels if the binary signal is in one condition and modulated to one of a second plurality of modulation levels if the binary signal is in the other condition; timing means for determining whether each time interval between successive transitions between two conditions of the binary signal is less than a predetermined value; and control means responsive to the timing means for causing the change in modulation level at transition following a time interval less than said predetermined value to be in the same direction as the change of modulation level at the previous transition unless the modulation level is already at the highest or lowest modulation level of said first and second pluralities of modulation levels.
Claim 2
Dependent Claim 176 words
An electrical signalling system for transmission of a facsimile signal derived from an original having no intermediate tones in which the facsimile signal is a binary signal of which one condition represents the image and the other condition represents the background, comprising: modulating means for generating a carrier signal modulated to one of a first plurality of alternate modulation levels if the binary signal is in one condition and modulated to one of a second plurality of modulation levels if the binary signal is in the other condition; timing means for determining whether each time interval between successive transitions between two conditions of the binary signal is less than a predetermined value; and control means responsive to the timing means for causing the change in modulation level at transition following a time interval less than said predetermined value to be in the same direction as the change of modulation level at the previous transition unless the modulation level is already at the highest or lowest modulation level of said first and second pluralities of modulation levels.
Claim 3
Dependent Claim 27 words
An electrical signalling system as claimed in claim 1, in which the means for generating a carrier signal is arranged to generate an amplitude modulated carrier signal.
Claim 4
Dependent Claim 164 words
An electrical signalling system as claimed in claim 1, said timing means including means for indicating both whether the time interval between the two most recent transitions is less than said predetermined value and whether the previous time interval between transitions is less than said predetermined value; said control means including means responsive to the timing means for causing the change in modulation level at a transition between intervals both of which are longer than said predetermined time to be in a direction towards a predetermined one of the highest and lowest modulation levels unless the modulation level before said transition is said predetermined modulation level; and said control means also including means for causing the change in modulation level at a transition after an interval longer than the predetermined time and before an interval shorter than the predetermined time to be in the direction of the highest modulation level if the modulation level before said transition is nearer to the highest modulation level.
Claim 5
Dependent Claim 166 words
An electrical signalling system as claimed in claim 3, including a delay device having a delay period equal to the predetermined time, a timing device responsive to each transition of the binary signal for producing an output signal which persists for a shorter period than the predetermined time, a first bistable device responsive to the timing device and arranged to take up a first state if an output signal from the timing device persists when a subsequent transition takes place and to take up a second state if the output signal from the timing device has terminated prior to such subsequent transition a second bistable device responsive to the first bistable device and arranged on each transition to take up a first state if the first bistable device is in its first state and to take up a second state if the first bistable device is in its second state, the means for generating a carrier signal being responsive to the first and second bistable devices.
Claim 6
Dependent Claim 65 words
An electrical signalling system as claimed in claim 1, including error detecting means for determining whether the state of the binary signal indicated by the modulation level of the carrier signal corresponds to the actual condition of the binary signal and gating means responsive to the error detection means and arranged to supply a signal which simulates an addition transition if an error is detected.
Claim 7
Dependent Claim 206 words
An electrical signalling system for transmission of a facsimile signal deriveD from an original having no intermediate tone in which the facsimile signal is a binary signal of which one condition represents the image and the other condition represents the background, comprising modulating means for altering phase of the carrier signal by a predetermined increment equal to the product of the reciprocal of an even integral number greater than two and 360* in response to each transition between the two conditions of the binary signal, said modulating means comprising a plurality of serially connected delay devices equal in number to one less than said even integral number, each delay device having a delay period equal to the product of the reciprocal of said even integral number and 360*, and selective connections means having a plurality of inputs equal in number to said even integral number, a single output and stepping means for connecting each input in turn to said output and adapted to be advanced by one step responsive to each transition of the facsimile signal, one of said inputs being connected to the input of the first delay device and each of the other inputs being connected to the output of a respective delay device.
Claim 8
Dependent Claim 206 words
An electrical signalling system for transmission of a facsimile signal deriveD from an original having no intermediate tone in which the facsimile signal is a binary signal of which one condition represents the image and the other condition represents the background, comprising modulating means for altering phase of the carrier signal by a predetermined increment equal to the product of the reciprocal of an even integral number greater than two and 360* in response to each transition between the two conditions of the binary signal, said modulating means comprising a plurality of serially connected delay devices equal in number to one less than said even integral number, each delay device having a delay period equal to the product of the reciprocal of said even integral number and 360*, and selective connections means having a plurality of inputs equal in number to said even integral number, a single output and stepping means for connecting each input in turn to said output and adapted to be advanced by one step responsive to each transition of the facsimile signal, one of said inputs being connected to the input of the first delay device and each of the other inputs being connected to the output of a respective delay device.
Claim 9
Dependent Claim 130 words
An electrical signalling system as claimed in claim 6, including demodulating means comprising an equal number of serially collected delay devices to the number of such devices in modulating means, each delay device having a delay period equal to that of a delay device in the modulating means, supply means for supplying a signal in phase with the unmodulated carrier to the input of the first delay device of the series of delay devices and a plurality of comparators, one greater in number than the delay devices, one comparator having one input connected to the output of the supply means and the other comparators each having one input connected to the output of a respective delay device, the other input of each comparator being connected to receive the incoming signal.

References Cited (Backward Citations)

US3244808A Cited
US3430143A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-14 1974-12-14 1975-06-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-14 1978-12-14 1979-06-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-14 1982-12-14 1983-06-15 $7700.00 Window Closed / Lapsed

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