Signal reshaper

Claim 2

A circuit for reshaping pulse signals comprising a comparator having first and second inputs and operative to alter state in response to each polarity reversal of the difference in signals applied to said first and second inputs, means for applying a pulse signal having higher and lower voltage levels to said first input, and means for applying said pulse signal to said second input comprising means for delaying said pulse signal, and means connected between said delaying means and said second input for compressing the higher and lower voltage levels of said delayed pulse signal.

Claim 3

A circuit for reshaping pulse signals according to claim 1 wherein said comparator comprises an amplifier operative in response to each positive going polarity reversal to provide a first voltage level output and operative in response to each negative going polarity reversal to provide a second voltage level output.

Claim 4

A circuit for reshaping pulse signals according to claim 1 wherein said voltage level compressing means comprises a diode network having a plurality of diodes for offsetting the higher voltage levEl of said delayed pulse signal in the negative direction and for offsetting the lower voltage level of said delayed pulse signal in the positive direction.

Claim 5

A circuit for reshaping pulse signals according to claim 3 wherein said diode network comprises a pair of oppositely poled shunt-connected diodes and means for biasing said diode pair to a voltage between said higher and said lower voltage levels.

Claim 6

A circuit for reshaping pulse signals according to claim 4 wherein one terminal of said diode pair is connected to said delaying means and the other terminal of said diode pair is coupled to said second input, and said biasing means comprising a voltage source for biasing said other terminal to a voltage between said higher and lower voltage levels and resistive means connected between said voltage source and said other terminal.

Claim 7

A circuit for reshaping distorted pulse signals comprising means for receiving an input pulse signal from a transmission path, said pulse signal having first and second voltage states, amplifier means having first and second inputs for providing a reshaped output pulse with a transition at each polarity reversal of the difference between a signal applied to said first input and a signal applied to said second input, first means for applying the pulse signal from said receiving means to said first input, second means for delaying said pulse signal and compressing the voltage states of said pulse signal from said receiving means and for applying said delayed and compressed pulse signal to said second input, said second means including a delay and a diode network having a plurality of diodes connected between said delay and said second input for shifting the first voltage state of said delayed pulse signal positively and for shifting the second voltage state of said delayed pulse signal negatively.

Claim 8

A circuit for reshaping distorted pulse signals comprising means for receiving an input pulse signal from a transmission path, said pulse signal having first and second voltage states, amplifier means having first and second inputs for providing a reshaped output pulse with a transition at each polarity reversal of the difference between a signal applied to said first input and a signal applied to said second input, first means for applying the pulse signal from said receiving means to said first input, second means for delaying said pulse signal and compressing the voltage states of said pulse signal from said receiving means and for applying said delayed and compressed pulse signal to said second input, said second means including a delay and a diode network having a plurality of diodes connected between said delay and said second input for shifting the first voltage state of said delayed pulse signal positively and for shifting the second voltage state of said delayed pulse signal negatively.

Claim 9

A circuit for reshaping distorted pulse signals according to claim 6 wherein said diode network comprises first and second oppositely poled shunt-connected diodes, means for rendering said first diode conductive when said delayed pulse signal is in said first voltage state, and means for rendering said second diode conductive when said delayed pulse signal is in said second voltage state.

Claim 10

A circuit for reshaping pulse signals comprising means for receiving an input pulse signal having high and low voltage levels from a transmission path, amplifying means having first and second input terminals, said amplifying means providing an output pulse having a predetermined high voltage level when a signal applied to said first terminal is more positive than the signal applied to said second terminal and a predetermined low voltage level when the signal applied to said first terminal is less positive than the signal applied to said second terminal, first means for applying said pulse signal from said receiving means to said first terminal, second means for delaying and compressing said pulse signal from said receiving means and for applying said delayed and compressed pulse signal to said second terminal, said second means comprising a pair of oppositely poled shunt-connected diodes, and means for biasing said diode pair to a reference voltage between said high and low voltage levels.

Claim 11

A circuit for reshaping pulse signals comprising means for receiving an input pulse signal having high and low voltage levels from a transmission path, amplifying means having first and second input terminals, said amplifying means providing an output pulse having a predetermined high voltage level when a signal applied to said first terminal is more positive than the signal applied to said second terminal and a predetermined low voltage level when the signal applied to said first terminal is less positive than the signal applied to said second terminal, first means for applying said pulse signal from said receiving means to said first terminal, second means for delaying and compressing said pulse signal from said receiving means and for applying said delayed and compressed pulse signal to said second terminal, said second means comprising a pair of oppositely poled shunt-connected diodes, and means for biasing said diode pair to a reference voltage between said high and low voltage levels.

Claim 12

A circuit for reshaping pulse signals comprising a transmission path, a first amplifier for receiving a pulse signal having high and low voltage levels from said path, a second amplifier having first and second inputs for amplifying the voltage difference between said first and second terminals, said second amplifier being operative in a first state in response to a positive voltage difference from said first input to said second input and being operative in a second state in response to a negative voltage difference from said first input to said second input, a first network connected from said first amplifier to said first input for applying the first amplifier output pulse signal to said first input, a delay network connected to said first amplifier outPut, a pair of oppositely poled shunt-connected diodes connected between said delay network and a second network, said second network being connected to said second input, a reference voltage source for biasing the junction of said diodes with said second network to a voltage between said high and low voltage levels, and a resistor connected between said reference voltage source and said junction.

Claim 13

A circuit for reshaping pulse signals comprising a transmission path, a first amplifier for receiving a pulse signal having high and low voltage levels from said path, a second amplifier having first and second inputs for amplifying the voltage difference between said first and second terminals, said second amplifier being operative in a first state in response to a positive voltage difference from said first input to said second input and being operative in a second state in response to a negative voltage difference from said first input to said second input, a first network connected from said first amplifier to said first input for applying the first amplifier output pulse signal to said first input, a delay network connected to said first amplifier outPut, a pair of oppositely poled shunt-connected diodes connected between said delay network and a second network, said second network being connected to said second input, a reference voltage source for biasing the junction of said diodes with said second network to a voltage between said high and low voltage levels, and a resistor connected between said reference voltage source and said junction.