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US3584269A Expired / Lapsed US ⏱️ 0.0 years remaining

Diffused equal impedance interconnections for integrated circuits

Assignee: International Business Machines Corp
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Filing: 1968-10-11
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Granted: 1971-06-08
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Expires: 1988-10-11
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Abstract

Abstract The method and apparatus for providing a semiconductor substrate having at least two conductive paths of equal impedance values. Each of the two paths include at least one diffused region in the substrate. The diffused regions of the two parts are provided with different resistivity and/or cross-sectional characteristics with respect to each other so as to compensate for differences in the spatial lengths of their associated conductive paths. Also, a multilevel interconnection grid utilizing the aforementioned diffused regions as one level and the conductive elements of a predetermined metallization pattern as another level. Also integrated circuit apparatus employing the aforementioned conductive paths and/or grid.

Inventors

  • 👤 Rudolf E Thun

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 09:02
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/20; H10D; H10D84/00; H10D84/201; H10D84/204; H10D84/209; H10W20/01; H10W20/021

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 21 words
A monolithic integrated circuit apparatus according to claim 1 wherein said integrated circuit apparatus is of the resistor-transistor logic circuit type.
Claim 2
Dependent Claim 32 words
A monolithic integrated circuit apparatus according to claim 1 wherein said input, output, and common regions of each of said transistors are the base, collector, and emitter, respectively, of the particular transistor.
Claim 3
Dependent Claim 17 words
A monolithic integrated circuit apparatus according to claim 1 whErein said transistors are of the bipolar type.
Claim 4
Dependent Claim 24 words
A monolithic integrated circuit apparatus according to claim 1 wherein each of said bias conductive path means has substantially the same fixed impedance value.
Claim 5
Dependent Claim 76 words
A monolithic integrated circuit apparatus according to claim 1 wherein at least the resistor second and third regions are arranged in parallel relationship with respect to one of the coordinate axes of a preselected coordinate system and at least some of said metal conductor elements are arranged in a parallel relationship with respect to another axis of said preselected coordinate system, said second and third regions providing undercrossings for preselected ones of said metal conductor elements.
Claim 6
Dependent Claim 18 words
A monolithic integrated circuit apparatus according to claim 1 wherein said coordinate system is of the rectangular type.
Claim 7
Dependent Claim 249 words
An interconnection grid having a predetermined coordinate system, said grid comprising in combination: a semiconductor substrate having at least one planar face; plural sets of diffused regions formed in said substrate inwardly from said face, said diffused regions being arranged in a substantially parallel relationship with one of the coordinate axes of said coordinate system, each of the resistor regions of the same particular set having substantially equal resistance values with respect to each other, the resistance values of at least two first and second sets being different with respect to each other; a plurality of metal conductors positioned on said face, at least some of said metal conductors being arranged in a substantially parallel relationship with another coordinate system; said metal conductors being connected in contacting relationship to said diffused regions in a predetermined manner for providing a plurality of interconnecting conductive paths, each of said paths having at least a mutually exclusive one of said diffused regions and each of said regions providing a predetermined portion of the impedance of said path, at least two of said paths having equal impedance values, and at least one of said last-mentioned two paths having a mutually exclusive one of said regions of said first set and a mutually exclusive one of said regions of said second set; and means for insulating those portions of said conductors which are not in contacting relationship with said diffused regions, said diffused regions further providing undercrossings for predetermined ones of said metal conductors.
Claim 8
Dependent Claim 18 words
An interconnection grid according to claim 8 wherein each of said interconnecting paths have substantially equal impedance values.
Claim 9
Dependent Claim 16 words
An interconnection grid according to claim 8 wherein said coordinate system is of the rectangular type.
Claim 10
Dependent Claim 210 words
A monolithic integrated circuit apparatus having a plurality of spatially distributed integrated circuit components disposed in a common substrate, preselected ones of said components requiring substantially equal-impedance interconnection paths to predetermined others of said components, each component of said preselected ones being disposed at a different distance to the particular component of said predetermined others to which it is required to be connected by one of said equal-impedance paths, said apparatus comprising: plural sets of diffused resistor regions disposed in said substrate, the resistor regions of at least a first one of the sets having a different resistivity than the resistivity of the resistor regions of at least another second one of the other sets, each of the resistor regions of the same particular set having substantially equal resistance values with respect to each other, the resistance values of at least said first and second sets being different with respect to each other; and interconnection means for interconnecting preselected ones of said resistor regions of said sets in a predetermined manner to provide said plural equal impedance paths, at least one of said equal impedance paths comprising at least one mutually exclusive resistor region from said first set and at least one mutually exclusive resistor region from said second set.
Claim 11
Dependent Claim 70 words
Circuit apparatus according to claim 11 wherein said preselected circuit components are of the active type, each of said active type components further comprising a bipolar transistor having base, emitter and collector regions, and each of said equal impedance paths providing a signal path interconnecting the collector region of one of said transistors from the preselected components to the collector region of one of said transistors from the predetermined components.

References Cited (Backward Citations)

US3416049A Cited
US3271685A Cited
US3491274A Cited
US3383614A Cited
US3387193A Cited
US3460050A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-07 1974-12-07 1975-06-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-07 1978-12-07 1979-06-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-07 1982-12-07 1983-06-08 $7700.00 Window Closed / Lapsed

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