Pulse generator and encoder

Claim 2

A pulse generating circuit comprising: a. a plurality of serially connected first monostable circuits; b. a plurality of serially connected second monostable circuits with gate means between said second monostable circuits; c. means connecting each of said first monostable circuits to the first circuit of said plurality of serially connected second monostable circuits; d. means for connecting each of said first monostable circuits to a control terminal of said gate means; and e. means connected to each of said second monostable circuits for receiving a pulse train.

Claim 3

A pulse generating circuit in accordance with claim 1 wherein said first and second monostable circuits are one-shot multivibrators.

Claim 4

A pulse generating circuit in accordance with claim 2 wherein the time duration of each pulse generated by said second monostable one-shot multivibrator circuits multiplied by the number of said second multivibrator circuits is no greater than the time duration of each pulse generated by said first one-shot multivibrator circuits.

Claim 5

A pulse generating circuit in accordance with claim 1 wherein said first monostable circuits are 1-second one-shot multivibrators, said second monostable circuits are 100 millisecond one-shot multivibrators, and said means for receiving a pulse train is a 50-millisecond one-shot multivibrator.

Claim 6

A pulse generating circuit comprising: a. a plurality of first monostable circuits each having an unstable state of a first duration, said first monostable circuits being serially connected so that the triggering of the first monostable circuit will sequentially trigger other first monostable circuits; b. a plurality of second monostable circuits each having an unstable state of second duration, said second duration multiplied by the number of second monostable circuits being no greater than said first duration, said second monOstable circuits being serially connected through gate means so that the triggering of the first monostable circuit of the plurality of second monostable circuits will sequentially trigger other second monostable circuits until a nonconducting gate means prevents the transmission of a trigger pulse; c. means connecting each of said first monostable circuits to the first circuit of said plurality of second monostable circuits whereby a trigger pulse is delivered to said first circuit of said plurality f second monostable circuits corresponding to the delivery of a trigger pulse to each of said first monostable circuits; d. means for connecting each of said first monostable circuits to a control terminal of said gate means whereby a voltage is delivered to said control terminal which renders said gate means nonconductive when one of said first monostable circuits is in the unstable state, and e. means connected to each of said second monostable circuits for receiving a pulse train in response to the triggering of said second monostable circuits.

Claim 7

A pulse generating circuit comprising: a. a plurality of first monostable circuits each having an unstable state of a first duration, said first monostable circuits being serially connected so that the triggering of the first monostable circuit will sequentially trigger other first monostable circuits; b. a plurality of second monostable circuits each having an unstable state of second duration, said second duration multiplied by the number of second monostable circuits being no greater than said first duration, said second monOstable circuits being serially connected through gate means so that the triggering of the first monostable circuit of the plurality of second monostable circuits will sequentially trigger other second monostable circuits until a nonconducting gate means prevents the transmission of a trigger pulse; c. means connecting each of said first monostable circuits to the first circuit of said plurality of second monostable circuits whereby a trigger pulse is delivered to said first circuit of said plurality f second monostable circuits corresponding to the delivery of a trigger pulse to each of said first monostable circuits; d. means for connecting each of said first monostable circuits to a control terminal of said gate means whereby a voltage is delivered to said control terminal which renders said gate means nonconductive when one of said first monostable circuits is in the unstable state, and e. means connected to each of said second monostable circuits for receiving a pulse train in response to the triggering of said second monostable circuits.

Claim 8

A pulse generating circuit in accordance with claim 5 wherein said first and second monostable circuits are one-shot multivibrators.

Claim 9

A pulse generating circuit in accordance with claim 5 wherein said first monostable circuits are 1-second one-shot multivibrators, said second monostable circuits are 100-millisecond one-shot multivibrators, and said means for receiving a pulse train is a 50-millisecond one-shot multivibrator.

Claim 10

A pulse generating circuit comprising: a. a plurality of pulse generating means; b. a plurality of gate means; c. said pulse generating means being serially connected through said gate means whereby the generation of a pulse by one of said pulse generating means produces a trigger pulse which may be transmitted through said gate means to the succeeding pulse generating means, each of said plurality of pulse generating means being a first monostable circuit; d. means for triggering the first pulse generating means, e. a plurality of serially connected second monostable circuits for selectively and sequentially closing and opening said gate means, and f. means connected to said plurality of pulse generating means for receiving a pulse train.

Claim 11

A pulse generating circuit comprising: a. a plurality of pulse generating means; b. a plurality of gate means; c. said pulse generating means being serially connected through said gate means whereby the generation of a pulse by one of said pulse generating means produces a trigger pulse which may be transmitted through said gate means to the succeeding pulse generating means, each of said plurality of pulse generating means being a first monostable circuit; d. means for triggering the first pulse generating means, e. a plurality of serially connected second monostable circuits for selectively and sequentially closing and opening said gate means, and f. means connected to said plurality of pulse generating means for receiving a pulse train.