US3581006A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Duplex control circuit
Assignee: Susquehanna Corp
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Filing: 1968-03-22
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Granted: 1971-05-25
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Expires: 1988-03-22
Abstract
Abstract An example of the duplex control circuit is a circuit formed of two logic flip-flops connected between two channels of a halfduplex telegraph circuit. This duplex control circuit functions to prevent reflections or feedback of the transmissions into the inactive channel. Each channel is controlled by one of the flipflops whereby the flip-flop controlling the inactive channel is set and locks this channel to a marking condition whenever a spacing signal is processed by the active channel and does not become reset until this spacing signal terminates at the input to the inactive channel.
Inventors
- 👤 Jacob L Wallace Jr
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 04:54
CPC Classifications
H; H04; H04L; H04L5/00; H04L5/14; H04L5/1461
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
152 words
A duplex control circuit for use in a two-channel, data transmission system, said circuit serving to isolate the inactive channel from data transmissions in the active channel, comprising two bistable circuits, each of said bistable circuits having a separate input connected into each one of the two channels and being responsive to signals received from each of said channels on said inputs such that the state of each of said bistable circuits is controlled by the signal conditions in said channels, each of said bistable circuits further having an output, and means in each channel connected to the output of one of said bistable circuits for controlling the passage of data transmissions through its associated channel in response to the state of the bistable circuit to whose output it is connected, the controlling means in the inactive channel serving to isolate the inactive channel from the data transmissions in the active channel.
Claim 2
Dependent Claim
152 words
A duplex control circuit for use in a two-channel, data transmission system, said circuit serving to isolate the inactive channel from data transmissions in the active channel, comprising two bistable circuits, each of said bistable circuits having a separate input connected into each one of the two channels and being responsive to signals received from each of said channels on said inputs such that the state of each of said bistable circuits is controlled by the signal conditions in said channels, each of said bistable circuits further having an output, and means in each channel connected to the output of one of said bistable circuits for controlling the passage of data transmissions through its associated channel in response to the state of the bistable circuit to whose output it is connected, the controlling means in the inactive channel serving to isolate the inactive channel from the data transmissions in the active channel.
Claim 3
Dependent Claim
85 words
A duplex control circuit as claimed in claim 1 wherein said controlling means in each channel comprises a gate for the passage of data transmissions therethrough, one input of each gate being connected to the output of a separate one of said bistable circuits, another input of each gate being connected to receive data transmissions in its associated channel the output of the gate in the inactive channel being maintained at a desired signal condition in the presence of data transmissions in the active channel.
Claim 4
Dependent Claim
46 words
A duplex control circuit as claimed in claim 2 wherein each of said bistable circuits is a flip-flop, one flip-flop having a set input connected into one channel and a reset input connected into the other channel, and the other flip-flop connected in the opposite manner.
Claim 5
Dependent Claim
46 words
A duplex control circuit as claimed claim 3 wherein the set input of each flip-flop is connected to the output of a gate in one channel and the reset input of the same flip-flop is connected at the input of the gate in the other channel.
Claim 6
Dependent Claim
62 words
A duplex control circuit as claimed in claim 4 wherein said gate in each controlling means is included in a repeater circuit in the associated channel of the system and said duplex control circuit further comprising an inverter connected at the input to each repeater, the output of the inverter in each channel forming one input to the gate in that channel.
Claim 7
Dependent Claim
48 words
A duplex control circuit as claimed in claim 4 wherein each flip-flop is formed of at least two NAND gates, the output of each NAND gate being connected to an input of the other NAND gate, and the output of one NAND gate serving as the flip-flop output.
Claim 8
Dependent Claim
30 words
A duplex control circuit as claimed in claim 6 further comprising a capacitor connected at the output of each channel gate to filter transients occurring in each of said channels.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-24 | 1974-11-23 | 1975-05-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-24 | 1978-11-23 | 1979-05-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-24 | 1982-11-23 | 1983-05-25 | $7700.00 | Window Closed / Lapsed |