Method of producing dielectric isolation for monolithic circuit

Abstract

Abstract A MICROELECTRONIC GEOMETRY AND MANUFACTURING PROCESS IN WHICH AN ELECTRODE OR REGION REMOTE FROM THE TOP SURFACE OF THE SUBSTRATE HAS A CONTINUOUS PORTION DEPOSITED ON THE TOP SURFACE TO PROVIDE EASIER AND BETTER DEPOSITION OR OTHER EMPLACEMENT OF ELECTRICAL CONTACTS THERETO. THE METHOD OF PRODUCING DIELECTRIC ISOLATION FOR ONE OR MORE REGIONS IN THE SUBSTRATE INCLUDES THE STEPS OF CUTTING A GROOVE IN A SEMICONDUCTOR WAFER SURROUNDING THE REGION TO BE ISLOATED, ESTABLISHING A HIGHLY CONDUCTIVE LAYER OF SEMICONDUCTOR MATERIAL ON THE TOP SURFACE OF THE WAFER AND ON ALL SURFACES OF THE GROOVE, ESTABLISHING AN INSULATING LAYER ADJACENT TO THE HIGHLY CONDUCTIVE LAYER, PROVIDING MECHANICAL SUPPORTING SUBSTRATE MATERIAL TO FILL THE GROOVE AND CONTINUE ABOVE THE ORIGINAL TOP SURFACE, AND CUTTING OFF THE ORIGINAL BOTTOM PORTION ALONG A LINE INTERSECTING THE BOTTOMS OF THE GROOVE AND INCLUDING THE LAYER OF CONDUCTIVE MATERIAL ON THE BOTTOM THEREOF SO AS TO EXPOSE THE INSULATING LAYER WHEREBY WHEN THE WAFER IS INVERTED THE EXPOSED SEMICONDUCTOR MATERIAL IN THE AREA SURROUNDED BY THE GROOVE WILL BE DIELECTRICALLY ISOLATED BY THE INSULATING LAYER.

Inventors

• 👤 James Lang Buie

Bibliographic Details