US3579281A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Combining network providing compensated tuning voltage for varactor
Assignee: Sierra Research Corp
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Filing: 1969-06-04
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Granted: 1971-05-18
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Expires: 1989-06-04
Abstract
Abstract A control circuit for an indirect frequency synthesizer which combines a plurality of control functions into a single compensated tuning voltage for the varactor control element of an associated voltage controlled oscillator. The combining circuit includes a resistor network for summing phase control and modulating signals, and a variable resistance circuit for generating a coarse steering signal. The summing network is resistively connected to the variable resistance circuit to form a variable impedance resistor divider operative to attenuate the combined phase control and modulating signals in a manner inversely related to the magnitude of the coarse steering signal and to combine the attenuated control signals with the coarse steering signal and to combine the attenuated control signals with the coarse steering voltage to provide the varactor tuning signal. More specifically, the attenuation provided by the impedance divider is operative to substantially compensate for the variation in voltage versus frequency sensitivity of the varactor with changes in the coarse steering voltage.
Inventors
- 👤 George H Kam
- 👤 Richard J Hughes
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 05:58
CPC Classifications
H; H03; H03C; H03C3/00; H03C3/02; H03C3/09; H03C3/0908; H03C3/095
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
87 words
A combining network for providing a compensated tuning voltage comprising, in combination, a source of first control signal, variable means for generating a second control signal, and means connecting said first control signal source to said second control signal generating means whereby said connecting means and said generating means form a variable impedance divider operative to attenuate said first control signal in a manner inversely related to the magnitude of said second control signal and to combine said attenuated first control signal with said second control signal.
Claim 2
Dependent Claim
87 words
A combining network for providing a compensated tuning voltage comprising, in combination, a source of first control signal, variable means for generating a second control signal, and means connecting said first control signal source to said second control signal generating means whereby said connecting means and said generating means form a variable impedance divider operative to attenuate said first control signal in a manner inversely related to the magnitude of said second control signal and to combine said attenuated first control signal with said second control signal.
Claim 3
Dependent Claim
80 words
A combining network in accordance with claim 1 wherein said connecting means and said means for generating a second control signal are resistive, said combined signals are applied as a tuning voltage for a tunable variable capacitance diode circuit, said second control signal is a coarse steering voltage, and said variable impedance divider is operative to substantially compensate said first control signal for the variation in voltage versus frequency sensitivity of said diode with changes in said coarse steering voltage.
Claim 4
Dependent Claim
99 words
A combining network in accordance with claim 2 wherein said variable means for generating a second control signal comprises a binary counter having a pulse drive input and a set of parallel outputs from which the digital number contained in said counter can be read, and a digital to analog converter connected at the outputs of said counter for generating as said second control signal a voltage level corresponding to the digital number stored in the counter at that instant in time, said second control signal voltage level being variable in response to input pulses applied to said counter.
Claim 5
Dependent Claim
158 words
A combining network in accordance with claim 3 and wherein said digital to analog converter comprises a source of direct current voltage, a summing bus, a first set of resistors each connected between said direct current voltage source and a respective one of the outputs of said counter, each of said first set of resistors having a value twice that of the resistor connected to the next less significant stage of said counter, and a second set of resistors respectively connected between the junctions of said first set of resistors with said counter outputs and said summing bus, and wherein said connecting means comprises a third set of resistors each connected between said first control signal source and a respective one of the junctions of said first set of resistors with said counter outputs, each of said third set of resistors having a value proportional to the value of the first set resistor to which it is connected.
Claim 6
Dependent Claim
94 words
A combining network in accordance with claim 2 wherein said variable means for generating a second control siGnal comprises a source of direct current voltage, a source of reference potential, and a first resistor and a variable resistance means serially connected in that order between said direct current voltage source and said source of reference potential, and wherein said connecting means comprises a second resistor connected between said first control signal source and the junction of said first resistor with said variable resistance means, said combined signal tuning voltage being available at said junction.
Claim 7
Dependent Claim
77 words
A combining network in accordance with claim 5 wherein said variable resistance means comprises a multiposition switch connected to said source of reference potential, and a set of resistors each connected between the junction of said first and second resistors and respective position terminal of said switch, each of said set of resistors having a different value and said switch being operative to selectively connect one of said set of resistors to said source of reference potential.
Claim 8
Dependent Claim
115 words
A combining network in accordance with claim 5 wherein said variable resistance means comprises a plurality of resistance circuits each including a resistor and transistor serially connected between the junction of said first and second resistors and said source of reference potential, each of said transistors having a control electrode, and a binary counter having a pulse drive input and a set of parallel outputs respectively connected to the control electrodes of said transistors whereby selected ones of the said transistors are rendered conducting in response to the digital number contained in said counter, said digital number and thus the selection of conducting transistors being variable in response to input pulses applied to said counter.
Claim 9
Dependent Claim
67 words
A combining network in accordance with claim 5 wherein said variable resistance means comprises third and fourth resistors and a transistor serially connected in that order between the junction of said first and second resistors and said source of reference potential, said transistor having a control electrode, a variable voltage source connected to the control electrode of said transistor, and a diode connected across said fourth resistor.
Claim 10
Dependent Claim
177 words
A combining network in accordance with claim 2 wherein said variable means for generating a second control signal comprises a source of direct current voltage, a source of reference potential, and a first resistor and a variable resistance means serially connected in that order between said direct current voltage source and said source of reference potential, wherein said first control signal is a phase control voltage, and wherein said connecting means comprises second and third resistors connected between said phase control voltage source and the junction of first resistor with said variable resistance means, and further including a modulating signal source connected through a fourth resistor to the junction of said second and third resistors, said variable impedance divider being operative to attenuate said phase control voltage and said modulating signal in a manner inversely related to the magnitude of said second control signal and to combine said attenuated phase control and modulating signals with said second control signal, said combined signal turning voltage being available at the junction of first resistor with said variable resistance means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-17 | 1974-11-16 | 1975-05-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-17 | 1978-11-16 | 1979-05-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-17 | 1982-11-16 | 1983-05-18 | $7700.00 | Window Closed / Lapsed |