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US3579079A Expired / Lapsed US ⏱️ 0.0 years remaining

Current source magnetic gating circuit for controlled rectifiers

Assignee: CGEE ALSTHOM NORTH AMERICA Inc
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Filing: 1965-11-17
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Granted: 1971-05-18
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Expires: 1985-11-17
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Abstract

Abstract For triggering semiconductor controlled rectifiers, an otherwise conventional gate pulse generator is given the characteristics of a current source by connecting in series therewith a nonlinear impedance comprising a diode poled to block gate current and shunted by the series combination of a source of forward bias voltage and a current limiting resistor.

Inventors

  • 👤 Fred W Kelley Jr

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 20:11
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/02; H02M7/04; H02M7/12; H02M7/145; H02M7/155; H02M7/162; H02M7/1623

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 208 words
A gating circuit for supplying gate pulses to a controlled rectifier, comprising: a. first and second alternating supply voltage terminals; b. a magnetic amplifier connected to said terminals, said amplifier having control means for determining its cyclic operating point; and c. load circuit means, including a load current conducting diode, for interconnecting said terminals, said amplifier, and the controlled rectifier, whereby gate pulses are supplied to the controlled rectifier on operation of the magnetic amplifier during those alternate half-cycles of the supply voltage when said first terminal is positive with respect to said second terminal; d. said load circuit means including nonlinear impedance means responsive to load current attaining a predetermined magnitude for limiting further increase thereof, said nonlinear impedance means comprising; i. second and third diodes connected in series with each other in said load circuit means, both of said second and third diodes being poled in opposition to said load current conducting diode, ii. a source of forward bias voltage connected across said second and third diodes, iii. a current limiting resistor in series with said source across said second and third diodes, and iv. cutoff means connected across said third diode for applying a reverse bias voltage thereto whenever suppression of gate pulses is desired.
Claim 2
Dependent Claim 208 words
A gating circuit for supplying gate pulses to a controlled rectifier, comprising: a. first and second alternating supply voltage terminals; b. a magnetic amplifier connected to said terminals, said amplifier having control means for determining its cyclic operating point; and c. load circuit means, including a load current conducting diode, for interconnecting said terminals, said amplifier, and the controlled rectifier, whereby gate pulses are supplied to the controlled rectifier on operation of the magnetic amplifier during those alternate half-cycles of the supply voltage when said first terminal is positive with respect to said second terminal; d. said load circuit means including nonlinear impedance means responsive to load current attaining a predetermined magnitude for limiting further increase thereof, said nonlinear impedance means comprising; i. second and third diodes connected in series with each other in said load circuit means, both of said second and third diodes being poled in opposition to said load current conducting diode, ii. a source of forward bias voltage connected across said second and third diodes, iii. a current limiting resistor in series with said source across said second and third diodes, and iv. cutoff means connected across said third diode for applying a reverse bias voltage thereto whenever suppression of gate pulses is desired.
Claim 3
Dependent Claim 275 words
A gating circuit for producing gate pulses capable of alternately turning on two interconnected controlled rectifiers, comprising: a. an alternating supply voltage transformer winding having first and second opposite terminals and a center tap therebetween; b. a pair of magnetic amplifiers connected respectively to said first and second terminals, said amplifiers having control means for determining their cyclic operating points; c. current limiting means connected to said center tap, said current limiting means comprising first and second serially interconnected diodes poled in agreement with one another and shunted by the series combination of a source of forward bias voltage and a current limiting resistor; d. a first gate pulse producing load circuit including in series one of said amplifiers, said current limiting means, and a third diode poled in opposition to said first diode, whereby current of only a limited magnitude can be conducted by said first load circuit during those supply voltage half cycles when said first terminal is positive with respect to said second terminal; e. a second gate pulse producing load circuit including in series the other amplifier, said current limiting means, and a fourth diode poled in oppositiOn to said first diode, whereby current of only said limited magnitude can be conducted by said second load circuit during those supply voltage half cycles when said first terminal is negative with respect to said second terminal; f. cutoff means connected across said second diode for applying a reverse bias voltage thereto when activated; and g. means connected to said cutoff means and responsive to current conducted by the controlled rectifiers for activating said cutoff means when a predetermined abnormal current condition occurs.
Claim 4
Dependent Claim 275 words
A gating circuit for producing gate pulses capable of alternately turning on two interconnected controlled rectifiers, comprising: a. an alternating supply voltage transformer winding having first and second opposite terminals and a center tap therebetween; b. a pair of magnetic amplifiers connected respectively to said first and second terminals, said amplifiers having control means for determining their cyclic operating points; c. current limiting means connected to said center tap, said current limiting means comprising first and second serially interconnected diodes poled in agreement with one another and shunted by the series combination of a source of forward bias voltage and a current limiting resistor; d. a first gate pulse producing load circuit including in series one of said amplifiers, said current limiting means, and a third diode poled in opposition to said first diode, whereby current of only a limited magnitude can be conducted by said first load circuit during those supply voltage half cycles when said first terminal is positive with respect to said second terminal; e. a second gate pulse producing load circuit including in series the other amplifier, said current limiting means, and a fourth diode poled in oppositiOn to said first diode, whereby current of only said limited magnitude can be conducted by said second load circuit during those supply voltage half cycles when said first terminal is negative with respect to said second terminal; f. cutoff means connected across said second diode for applying a reverse bias voltage thereto when activated; and g. means connected to said cutoff means and responsive to current conducted by the controlled rectifiers for activating said cutoff means when a predetermined abnormal current condition occurs.

References Cited (Backward Citations)

US2781420A Cited
US3176212A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-05-17 1974-11-16 1975-05-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-05-17 1978-11-16 1979-05-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-05-17 1982-11-16 1983-05-18 $7700.00 Window Closed / Lapsed

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