← Back to Patent Explorer
US3579078A Expired / Lapsed US ⏱️ 0.0 years remaining

Constant current high-voltage power supply

Assignee: Northrop Grumman Space and Mission Systems Corp
•
Filing: 1969-10-06
•
Granted: 1971-05-18
•
Expires: 1989-10-06
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A direct current DC source and a square wave voltage source are applied to a bridge type switching amplifier. The output of the amplifier is applied to the primary of a step up transformer, and the secondary of the transformer is connected to a voltage quadrupler. The output of the voltage quadrupler is the desired DC voltage output.

Inventors

  • 👤 Donald L Cronin
  • 👤 Bertrand F Fraber
  • 👤 Charles R Nockey

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 20:30
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/33569; H02M3/33573

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 435 words
A constant current high voltage power supply comprising: an input; a first transistor having a collector emitter and base, the collector coupled to the input, and the base adapted to receive a first pulse-width modulated square wave; a second transistor having a collector emitter and base; the collector coupled to the input, and the base adapted to receive a second pulse-width modulated square wave 180* out of phase with respect to the first pulse-width modulated square wave; a first resistor connecting the emitter of the first transistor to the emitter of the second transistor; a first diode coupled across the emitter and collector of the first transistor; the anode connected to the emitter of said first transistor; a second diode coupled across the emitter and collector of the second transistor; the anode connected to the emitter of said second transistor; a third transistor having a collector emitter and base; the collector coupled to the emitter of the first transistor; the emitter coupled to ground; and the base aDapted to receive a third pulse-width modulated square wave identical to the second square waVe; a fourth transistor having an emitter base and collector; the collector coupled to the emitter of the second transistor; the emitter connected to ground; and the base adapted to receive a fourth pulse-width modulated square wave identical to the first square wave; a third diode coupled across the emitter and collector of the third transistor; the anode connected to the collector of the third transistor; a fourth diode coupled across the emitter and collector of the fourth transistor; the anode connected to the collector of the fourth transistor; a step-up transformer; the primary terminals shunted across the first resistor; and the secondary terminals connected respectively to ground and to one terminal of a first capacitor and one terminal of a second capacitor; an output terminal; a fifth diode connected between the other terminal of the first capacitor and the output terminal; the anode connected to the other terminal of the first capacitor; a third capacitor and a fourth capacitor connected in series and shunted across the output terminal and ground; a sixth diode connected across the anode of the fifth diode and the juncture of the third and fourth capacitors; the cathode connected to the anode of the fifth diode; a seventh diode connected across the anode of the sixth diode and the other terminal of the second capacitor; the cathode connected to the anode of the sixth diode; and an eighth diode connected across the anode of the seventh diode and ground; the cathode connected to the anode of the seventh diode.
Claim 2
Dependent Claim 435 words
A constant current high voltage power supply comprising: an input; a first transistor having a collector emitter and base, the collector coupled to the input, and the base adapted to receive a first pulse-width modulated square wave; a second transistor having a collector emitter and base; the collector coupled to the input, and the base adapted to receive a second pulse-width modulated square wave 180* out of phase with respect to the first pulse-width modulated square wave; a first resistor connecting the emitter of the first transistor to the emitter of the second transistor; a first diode coupled across the emitter and collector of the first transistor; the anode connected to the emitter of said first transistor; a second diode coupled across the emitter and collector of the second transistor; the anode connected to the emitter of said second transistor; a third transistor having a collector emitter and base; the collector coupled to the emitter of the first transistor; the emitter coupled to ground; and the base aDapted to receive a third pulse-width modulated square wave identical to the second square waVe; a fourth transistor having an emitter base and collector; the collector coupled to the emitter of the second transistor; the emitter connected to ground; and the base adapted to receive a fourth pulse-width modulated square wave identical to the first square wave; a third diode coupled across the emitter and collector of the third transistor; the anode connected to the collector of the third transistor; a fourth diode coupled across the emitter and collector of the fourth transistor; the anode connected to the collector of the fourth transistor; a step-up transformer; the primary terminals shunted across the first resistor; and the secondary terminals connected respectively to ground and to one terminal of a first capacitor and one terminal of a second capacitor; an output terminal; a fifth diode connected between the other terminal of the first capacitor and the output terminal; the anode connected to the other terminal of the first capacitor; a third capacitor and a fourth capacitor connected in series and shunted across the output terminal and ground; a sixth diode connected across the anode of the fifth diode and the juncture of the third and fourth capacitors; the cathode connected to the anode of the fifth diode; a seventh diode connected across the anode of the sixth diode and the other terminal of the second capacitor; the cathode connected to the anode of the sixth diode; and an eighth diode connected across the anode of the seventh diode and ground; the cathode connected to the anode of the seventh diode.

References Cited (Backward Citations)

US3299370A Cited
US3295043A Cited
US3400319A Cited
US3435320A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-05-17 1974-11-16 1975-05-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-05-17 1978-11-16 1979-05-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-05-17 1982-11-16 1983-05-18 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag