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US3577130A Expired / Lapsed US ⏱️ 0.0 years remaining

Means for limiting field length of computed data

Assignee: Fairchild Semiconductor Corp
•
Filing: 1969-10-03
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Granted: 1971-05-04
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Expires: 1989-10-03
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Abstract

Abstract Limit hardware for controlling the field length of resultant data produced by a data processor including a limit register, a counter and a comparator. The limit register is loaded with any desired number representing the desired number of fields of the resultant data, while the counter is incremented as each field of resultant data is produced by the processor. When the contents of the limit register and the counter are equal, data processing is terminated and the desired number of resultant data produced by the processor is supplied to any appropriate user, before a new processing operation is initiated.

Inventors

  • 👤 Rex Rice
  • 👤 Gilman D Chesley
  • 👤 William R Smith

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 06:04
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F2207/00; G06F2207/38; G06F2207/3804; G06F2207/3808; G06F2207/3812; G06F2207/3816; G06F7/499; G06F7/49942

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 279 words
In a data processing system of the type including a data processor which is suppliable with data to be processed therein to provide resultant data therefrom, the resultant data comprising at least one field, a circuit arrangement comprising: a data processor for processing data supplied thereto and for providing resultant data comprising at least one resultant data field; processor output means for receiving each resultant data field from said processor; counting means coupled to said processor output means for counting the number of resultant data fields which are received thereby; limit register means for storing a number representing a desired number of fields of said resultant data; a memory comprising a plurality of addressable storage locations, memory address and memory data registers, said memory including at least one limit number address generator for providing the address in said memory of a selected limit number and means for activating said limit number address register to provide the address in said memory at which said selected limit number is stored to read out said number into said data register for subsequent supply to said limit register means; bus means for coupling said limit register means to said memory data register to enable the transfer of a number from said data register to said limit register means for use in limiting the number of fields of resultant data produced by the processor with which said limit register means is associated; and comparing means to which said counting means and said limit register means are connected for limiting the number of fields of resultant data supplied by said processor to said processor output means to equal the number in said limit register means.
Claim 2
Dependent Claim 279 words
In a data processing system of the type including a data processor which is suppliable with data to be processed therein to provide resultant data therefrom, the resultant data comprising at least one field, a circuit arrangement comprising: a data processor for processing data supplied thereto and for providing resultant data comprising at least one resultant data field; processor output means for receiving each resultant data field from said processor; counting means coupled to said processor output means for counting the number of resultant data fields which are received thereby; limit register means for storing a number representing a desired number of fields of said resultant data; a memory comprising a plurality of addressable storage locations, memory address and memory data registers, said memory including at least one limit number address generator for providing the address in said memory of a selected limit number and means for activating said limit number address register to provide the address in said memory at which said selected limit number is stored to read out said number into said data register for subsequent supply to said limit register means; bus means for coupling said limit register means to said memory data register to enable the transfer of a number from said data register to said limit register means for use in limiting the number of fields of resultant data produced by the processor with which said limit register means is associated; and comparing means to which said counting means and said limit register means are connected for limiting the number of fields of resultant data supplied by said processor to said processor output means to equal the number in said limit register means.
Claim 3
Dependent Claim 49 words
A data processing system as described in claim 1 wherein said comparing means are coupled to said processor for inhibiting the processing in said processor when the count from said counting means and the number in said limit register means which are supplied to said comparing means are equal.

References Cited (Backward Citations)

US3161763A Cited
US3219982A Cited
US3299410A Cited
US3434114A Cited
US3448436A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-05-03 1974-11-02 1975-05-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-05-03 1978-11-02 1979-05-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-05-03 1982-11-02 1983-05-04 $7700.00 Window Closed / Lapsed

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