US3577009A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Quadrature rejection and frequency conversion circuit
Assignee: Bendix Corp
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Filing: 1969-02-17
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Granted: 1971-05-04
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Expires: 1989-02-17
Abstract
Abstract A circuit for eliminating quadrature components from a sinusoidal input signal is described. The circuit also divides the frequency of the input signal and converts it into a square wave. Conversion of the input is achieved by the use of a dividing signal and tandem connected gating circuits which operate on the sinusoidal input signal.
Inventors
- 👤 Laurence C Hofmeister
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 22:49
CPC Classifications
H; H03; H03B; H03B19/00; H03B19/06; H03B19/14
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
152 words
A circuit for rejecting out-of-phase components of a periodically varying signal and converting the frequency and shape of said varying signal comprising: first input means for receiving said signal as a first input signal at a frequency F and applying said signal to a conduction electrode of a first gate means; second input means for receiving a second input signal at A frequency f, said frequencies F and f being different and related by an integer multiple N; means for frequency multiplying and rectifying said frequency f signal; means for applying the multiplied-rectified signal to the control electrode of said first gate means; signal modification means for applying the output of said first gate to the conduction electrode of a second gate; means for applying said signal at a frequency f to the control electrode of said second gate means; and output means for receiving the output of said second gate means.
Claim 2
Dependent Claim
152 words
A circuit for rejecting out-of-phase components of a periodically varying signal and converting the frequency and shape of said varying signal comprising: first input means for receiving said signal as a first input signal at a frequency F and applying said signal to a conduction electrode of a first gate means; second input means for receiving a second input signal at A frequency f, said frequencies F and f being different and related by an integer multiple N; means for frequency multiplying and rectifying said frequency f signal; means for applying the multiplied-rectified signal to the control electrode of said first gate means; signal modification means for applying the output of said first gate to the conduction electrode of a second gate; means for applying said signal at a frequency f to the control electrode of said second gate means; and output means for receiving the output of said second gate means.
Claim 3
Dependent Claim
36 words
The circuit of claim 1 wherein said frequency relationship is F/f N; said first and second input signals are sinusoidal; and the output of said second gate means is a square wave at a frequency f.
Claim 4
Dependent Claim
16 words
The circuit of claim 2 wherein N 2; and said multiplied-rectified signal has a frequency F.
Claim 5
Dependent Claim
28 words
The circuit of claim 3 wherein said first input signal is an error signal and said second input signal is said first input divided by said multiple N.
Claim 6
Dependent Claim
30 words
The circuit of claim 4 wherein said means for applying is a filter which removes the DC component from said multiplied-rectified signal and is tuned to pass said frequency F.
Claim 7
Dependent Claim
38 words
The circuit of claim 1 wherein said first input signal is an error signal from a sensor in a control system; said second input signal is a reference input; and said integer multiple N is equal to F/f.
Claim 8
Dependent Claim
37 words
The circuit of claim 6 wherein said means for multiplying-rectifying multiplies said second input signal by a factor equal to N so that the output of said means for multiplying-rectifying is at a frequency equal to F.
Claim 9
Dependent Claim
30 words
The circuit of claim 7 wherein said means for applying is a series resonant circuit frequency tuned to a frequency 2F; and said signal modification means is a smoothing circuit.
Claim 10
Dependent Claim
28 words
The circuit of claim 6 wherein said first and second gate means are similar field effect transistors; and said control electrodes are the gate electrodes of said transistors.
Claim 11
Dependent Claim
78 words
The circuit of claim 9 further including additional rectifier means in the gate circuits of said transistors; said first transistor is gated at a frequency F so that its output is a fluctuating DC voltage; said smoothing circuit is an R.C. network so that a steady DC is applied to the source electrode of said second transistor; said second transistor is gated at a frequency f so that its output is a square wave at a frequency f.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-03 | 1974-11-02 | 1975-05-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-03 | 1978-11-02 | 1979-05-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-03 | 1982-11-02 | 1983-05-04 | $7700.00 | Window Closed / Lapsed |