US3576569A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Plural matrix keyboard with electrical interlock circuit
Assignee: HP Inc
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Filing: 1968-10-02
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Granted: 1971-04-27
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Expires: 1988-10-02
Abstract
Abstract The key switches of a keyboard are connected between the row and column conductors in a switching matrix. Each key when operated generates a unique six-bit binary code. The three most significant bits are produced by a diode encoding matrix formed with the column conductors, and the three least significant bits are produced by a diode encoding matrix formed with the row conductors. A voltage developed across a resistor in the keyboard voltage supply circuit produces a ''''key down'''' signal whenever a single key is operated. An electrical interlock circuit threshold detects the voltage across the resistor and inhibits the ''''key down'''' signal when two or more keys are operated simultaneously.
Inventors
- 👤 Robert E Watson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:58
CPC Classifications
H; H03; H03M; H03M11/00; H03M11/22
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
244 words
A keyboard circuit for a digital data processing system comprising: switching matrix means including: a plurality of column conductors; a plurality of row conductors; a plurality of keyboard switches respectively selectively interconnecting said column conductors and said row conductors; asymmetrically conducting means for electrically isolating the combinations of interconnectable column and row conductors from one another; first and second encoding matrix means responsive to actuation of said switches for respectively producing signals corresponding to first and second groups of bits in a binary code; said first encoding matrix means being associated with said column conductors and including: a plurality of binary output means associated respectively with different bits in said first group of bits; and a plurality of asymmetrically conducting means for connecting each of said binary output means to a predetermined combination of said column conductors; said second encoding matrix means being associated with said row conductors and including: a plurality of binary output means associated respectively with difFerent bits in said second group of bits; and a plurality of asymmetrically conducting means for connecting each of said last-named binary output means to a predetermined combination of said row conductors; resistance means for connecting each of said row conductors to a voltage source of one polarity; a common terminal; resistance means for connecting each of said column conductors to said common terminal; and input resistance means for connecting said common terminal to a voltage source having a polarity opposite to said one polarity.
Claim 2
Dependent Claim
244 words
A keyboard circuit for a digital data processing system comprising: switching matrix means including: a plurality of column conductors; a plurality of row conductors; a plurality of keyboard switches respectively selectively interconnecting said column conductors and said row conductors; asymmetrically conducting means for electrically isolating the combinations of interconnectable column and row conductors from one another; first and second encoding matrix means responsive to actuation of said switches for respectively producing signals corresponding to first and second groups of bits in a binary code; said first encoding matrix means being associated with said column conductors and including: a plurality of binary output means associated respectively with different bits in said first group of bits; and a plurality of asymmetrically conducting means for connecting each of said binary output means to a predetermined combination of said column conductors; said second encoding matrix means being associated with said row conductors and including: a plurality of binary output means associated respectively with difFerent bits in said second group of bits; and a plurality of asymmetrically conducting means for connecting each of said last-named binary output means to a predetermined combination of said row conductors; resistance means for connecting each of said row conductors to a voltage source of one polarity; a common terminal; resistance means for connecting each of said column conductors to said common terminal; and input resistance means for connecting said common terminal to a voltage source having a polarity opposite to said one polarity.
Claim 3
Dependent Claim
100 words
The keyboard circuit of claim 1, further including electrical interlock means responsive to the signal at said common terminal for providing an output signal when one of said key switches is operated and for inhibiting said output signal when two or more of said key switches are simultaneously operated, said electrical interlock means including: threshold detector means for producing an inhibit signal in response to a predetermined voltage level at said common terminal; and means for gating the signal at said common terminal, said gating means having an inhibit input responsive to the inhibit signal from said threshold detector means.
Claim 4
Dependent Claim
63 words
The keyboard circuit of claim 2, said threshold detector means including: a source of reference voltage having a magnitude intermediate the two voltage levels at said common terminal which correspond to operation of one key switch and two key switches, respectively; and differential amplifier means for producing said inhibit signal when the voltage at said common terminal is greater than said reference voltage.
Claim 5
Dependent Claim
31 words
The keyboard circuit of claim 2, further including means connected between said common terminal and said gating means for delaying the signal at said common terminal for a predetermined time interval.
Claim 6
Dependent Claim
23 words
The keyboard circuit of claim 1, said binary output means of said first and second encoding matrix means each including a signal amplifier.
Claim 7
Dependent Claim
35 words
The keyboard circuit of claim 1, said asymmetrically conducting means for electrically isolating the combinations of interconnectable column and row conductors including a diode connected in series with each of said plurality of column conductors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-26 | 1974-10-26 | 1975-04-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-26 | 1978-10-26 | 1979-04-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-26 | 1982-10-26 | 1983-04-27 | $7700.00 | Window Closed / Lapsed |