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US3573650A Expired / Lapsed US ⏱️ 0.0 years remaining

Automatic frequency controlled oscillators

Assignee: BAE Systems Electronics Ltd
•
Filing: 1969-04-07
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Granted: 1971-04-06
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Expires: 1989-04-07
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Abstract

Abstract Automatic frequency control means for oscillator arrangement of modulatable frequency wherein signals from the oscillator, and signals from a reference source are compared in a comparator which produces signals dependent on the frequency difference of the oscillator and the reference at one or other of two outputs, in dependence upon the sense of said difference. The signals from the comparator drive a circuit which produces a frequency controlling signal which is fed to the oscillator.

Inventors

  • 👤 Ugo Maltese

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 04:38
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03C; H03C3/00; H03C3/02; H03C3/09

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 134 words
An oscillator arrangement of modulatable frequency having automatic frequency control means comprising a comparator which is arranged to compare a frequency derived from and dependent on the oscillator frequency with a frequency derived from and dependent on the frequency of a reference frequency source, said comparator being adapted to provide at one or other of two outputs thereof a signal consisting of a number of pulses per unit of time proportional to the difference between the two inputs thereto, said pulses appearing at one or other of said outputs in dependence upon the sense of said difference and being employed to drive an integrating circuit to produce a frequency controlling signal which is applied to the oscillator and is of polarity and magnitude respectively dependent on the sense and magnitude of the aforesaid difference.
Claim 2
Dependent Claim 134 words
An oscillator arrangement of modulatable frequency having automatic frequency control means comprising a comparator which is arranged to compare a frequency derived from and dependent on the oscillator frequency with a frequency derived from and dependent on the frequency of a reference frequency source, said comparator being adapted to provide at one or other of two outputs thereof a signal consisting of a number of pulses per unit of time proportional to the difference between the two inputs thereto, said pulses appearing at one or other of said outputs in dependence upon the sense of said difference and being employed to drive an integrating circuit to produce a frequency controlling signal which is applied to the oscillator and is of polarity and magnitude respectively dependent on the sense and magnitude of the aforesaid difference.
Claim 3
Dependent Claim 35 words
An arrangement as claimed in claim 1 wherein the reference frequency input to the comparator is three times the other input thereto said other input being an input of the nominal frequency of the oscillator.
Claim 4
Dependent Claim 43 words
An arrangement as claimed in claim 2 wherein the comparator inputs derived from the oscillator and from the reference source are derived by means of squaring and amplitude limiting circuits in the input siGnal paths to the two input terminals of the comparator.
Claim 5
Dependent Claim 18 words
An arrangement as claimed in claim 3 wherein the reference frequency is derived from a crystal controlled oscillator.
Claim 6
Dependent Claim 34 words
An arrangement as claimed in claim 4 wherein the two input signals fed to the comparator are fed thereto through a bistable connected and arranged to synchronize the wavefronts of said two input signals.
Claim 7
Dependent Claim 90 words
An arrangement as claimed in claim 5 wherein said bistable feeds into a double shift register which is constituted by two further bistables and which cooperates with two logic gates one of which provides the logic product of the synchronized signal at the input of the first stage of the shift register and at the output of the second stage of the register and the other of which provides the logic product of the synchronized signals at the inputs and at the outputs of both stages of the shift registers.
Claim 8
Dependent Claim 58 words
An arrangement as claimed in claim 6 wherein the integrator circuit includes two transistor fed respectively with outputs from the logic gates one being fed through a monostable and an inverter and the other being fed through a monostable, the two monostables being designed to produce an increase in the duration of the output pulses from the gates.
Claim 9
Dependent Claim 45 words
An arrangement as claimed in claim 7 wherein the two transistors are connected to draw currents of opposite polarity from a capacitor cooperating with an integrator network to drive a third transistor which provides the controlling signal for the oscillator to be controlled in frequency.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-04-05 1974-10-05 1975-04-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-04-05 1978-10-05 1979-04-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-04-05 1982-10-05 1983-04-06 $7700.00 Window Closed / Lapsed

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